Method for fabricating an isolation region in a semiconductor su

Details Method for fabricating an isolation region in a semiconductor su Method for fabricating an isolation region in a semiconductor su

1988-06-02

1989-10-24

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 67, 437 72, H01L 21265, H01L 2176

Patent

active

048762148

ABSTRACT:
An isolation region is fabricated in a silicon substrate by first forming a silicon dioxide insulating layer on the substrate. A silicon nitride mask layer and an oxide layer are then deposited on the insulating layer. The oxide, mask and insulating layers and the substrate are etched to form a trench in the substrate. A channel stopper is implanted in substrate below the trench and the oxide layer is then stripped. Thereafter, the trench surface is oxidized to extend the insulating layer into the trench. Next, the trench is partially filled with polysilicon material, the surface of which is initially oxidized to extend the insulating layer over the trench. The mask layer is etched back to expose portions of the insulating layer adjacent the trench. The upper surface of the polysilicon material in the trench and portions of the substrate beneath exposed portions of the insulating layer are further oxidized to thicken the insulating layer over the trench.

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