Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2006-07-18
2006-07-18
Smith, Matthew (Department: 2823)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C435S405000, C435S410000, C435S424000, C435S430100, C438S436000, C438S442000, C438S453000, C438S702000, C438S787000
Reexamination Certificate
active
07078313
ABSTRACT:
Recesses between gate layer stacks are filled with a first electrically insulating material. Cavities or voids are opened up during the removal of a portion of the first insulating material. These voids are filled during the application of a conductive layer and can then lead to short circuits. Inventively, a layer for closing up voids is produced before the conductive material is applied, as a result of growing a second electrically insulating material onto the surface of the remaining first insulating material. This second insulating layer closes up voids that have formed in the first insulating material so that they can no longer lead to short circuits. In particular, voids that are difficult to gain access to and open out into side walls of contact holes can in this way be closed up in a simple manner.
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Greenberg Laurence A.
Infineon - Technologies AG
Locher Ralph E.
Pham Thanh V.
Smith Matthew
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