Fishing – trapping – and vermin destroying
Patent
1990-06-29
1992-02-11
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 56, 437 74, 437 77, H01L 21265
Patent
active
050875795
ABSTRACT:
Disclosed is a bipolar-CMOS circuit which includes a NMOS transistor site (18) electrically isolated from a bipolar transistor site (16). The NMOS transistor site (18) includes a semiconductor region (24) isolated from a bipolar transistor well (26) by deep diffusion ring (32). A buried layer (13) forms a bottom of the deep diffusion isolation ring (32). A backgate voltage can be applied to the isolated semiconductor region (24) of the NMOS device, which bias may be different than that applied to the substrate (10). Optimum performance of the NMOS transistor is thus assured irrespective of the magnitude of operating voltage of the bipolar transistor.
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Donaldson Richard
Hearn Brian E.
Merret Rhys
Nguyen Tuan
Sharp Melvin
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