Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1999-05-17
2000-11-21
Chaudhuri, Olik
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438624, 438787, H01L 21762
Patent
active
061502383
ABSTRACT:
A method for fabricating a trench isolation is disclosed. First, a first insulated layer having a void is formed within the trench of the semiconductor. Next, the upper portion of said first insulated layer is etched to remove the void of said first insulated layer. Then, a second insulated layer having a void is formed over the first insulated layer. Next, the upper portion of said second insulated layer is etched to remove the void of said second insulated layer, thereby forming a trench isolation including the remainder of said first and second insulated layers.
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Chi Ming-Ren
Hung Tun-Fu
Su Wen-Jet
Wu Chih-Ta
Chaudhuri Olik
Chou Chien-Wei (Chris)
Duy Mai Anh
Mosel Vitelic Inc.
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