Semiconductor device manufacturing: process – Forming schottky junction – Compound semiconductor
Patent
1998-12-04
2000-06-20
Monin, Jr., Donald L.
Semiconductor device manufacturing: process
Forming schottky junction
Compound semiconductor
438578, 438182, 438303, 438572, H01L 2128
Patent
active
060777613
ABSTRACT:
A method for fabricating a field effect transistor (FET) with a T-like gate structure includes forming a silicon nitride layer over a silicon substrate and patterning it to form an opening that exposes the substrate. A dielectric layer is formed on a lower portion of each side-wall of the opening so that the opening has a T-like free space. A doped polysilicon layer fills the T-like free space through only one deposition. After performing a planarization on the doped polysilicon layer, a titanium metal layer is formed over the substrate. A self-aligned titanium silicide is formed over the substrate other than the dielectric layer surface through a rapid thermal process (RTP). A selective etching process is performed to remove the remaining titanium metal layer. After removing the dielectric layer a RTP is performed again to reform the crystal structure of the titanium silicide layer so as to reduce its resistance. A T-like gate structure is formed.
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Wolf, S. Silicon Processing for the VLSI Era, vol. 2: Process Integration. Lattice Press, 1990. pp. 67-69, 556-557, 1990.
Chen Kuen-Chu
Chen Weng-Yi
Huang Jiawei
Monin, Jr. Donald L.
Peralta Ginette
United Integrated Circuit Corp.
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