Semiconductor device manufacturing: process – Making passive device – Resistor
Reexamination Certificate
1998-11-13
2001-11-13
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Making passive device
Resistor
Reexamination Certificate
active
06316325
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to semiconductor fabrication, and more particularly to a method for fabricating a thin film resistor over a semiconductor device.
2. Description of Related Art
In semiconductor fabrication for an integrated circuit (IC) device, the N
+
, P
+
, well and poly usually also serve as resistor layers but they have relatively lower resistance. Resistance, R, of a material typically is expressed as:
R=
L/A,
where
is the resistivity of the material with a unit &OHgr;-cm, L is the length of the material, and A is the cross-sectional area.
In order to increase resistance R, one can either reduce the cross-sectional area A or increase the length L. Since the resistor layer has its minimum cross-sectional area A in IC fabrication, one choice is increasing the length L so as to achieve the desired higher resistance R. However, as the device dimension of IC is reduced, the length L may consume too much of the available fabrication area. It is necessary to use another material with higher resistivity to take the places of N
+
, P
+
, well and poly. One of the materials with higher resistivity is SiCr, which is often used to form a thin film resistor.
FIGS. 1A-1K
are cross-sectional views of a portion of a substrate, schematically illustrating conventional fabrication processes of a thin film resistor.
In
FIG. 1A
, a dielectric substrate
10
is provided. Below the dielectric substrate
10
, several semiconductor devices formed on a semiconductor substrate may have been formed but not shown. The dielectric substrate
10
is, for example, an interconnect dielectric layer including borophosphosilicate glass (BPSG), phosphosilicate glass (PSG), Si
3
N
4
, SiO
x
N
y
, or SiO
2
. The dielectric substrate
10
is formed by chemical vapor deposition (CVD).
In
FIG. 1B
, a thin film resistor
12
including SiCr is formed by sputtering deposition at about 300° C. on the dielectric substrate
10
. In
FIG. 1C
, a passivation layer
14
is formed on the thin film resistor
12
. The passivation layer
14
including aluminum or a mix of Al/Si/Cu is used to protect the thin film resistor
12
from damages due to subsequent fabrication process. In
FIG. 1D
, a photoresist layer
16
with a desired pattern is formed on the passivation layer
14
. In
FIG. 1E
, using the photoresist layer
16
as a mask, the passivation layer
14
is etched by a plasma etching process to expose a portion of the thin film resistor
12
beside the photoresist layer
16
. The passivation layer
14
becomes a passivation layer
14
a.
The photoresist layer
16
is removed. In
FIG. 1F
, using the passivation layer
14
a
as a mask, the exposed portion of the thin film resistor
12
is removed by plasma etching. The thin film resistor
12
becomes a thin film resistor
12
a.
In
FIG. 1G
, a metal layer
18
is formed over the dielectric substrate
10
, in which the passivation layer
14
a
and the thin film resistor
12
a
are covered.
In
FIG. 1H
, a patterned photoresist layer
20
is formed on the metal layer
18
, which has an exposed portion above the passivation layer
14
a.
In
FIG. 1I
, using the photoresist layer
20
as a mask, a plasma etching process is performed to remove the exposed portion of the metal layer
18
so that the passivation layer
14
a
portion of the dielectric substrate
10
are exposed. The metal layer
18
becomes a metal layer
18
a.
A remaining portion of the metal layer
18
forms a metal spacer
22
on each sidewall of the passivation layer
14
a
and the thin film resistor
12
a.
The photoresist layer
20
is removed.
In
FIG. 1J
, a photoresist layer
24
is formed over the dielectric layer
10
is fully cover the conductive layer
18
a
but leave the metal spacer
22
, the passivation layer
14
a,
and a portion of the dielectric substrate
10
at each side of the passivation layer
14
a
to be exposed.
In FIG.
1
J and
FIG. 1K
, using the photoresist layer
24
as a mask, the passivation layer
14
a
and the metal spacer
22
are removed by wet etching so that the thin film resistor
12
a
is exposed. The photoresist layer
24
is removed so that there are the thin film resistor layer
12
a
and the metal layer
18
a
remaining on the dielectric substrate
10
.
As an IC device is formed at a deep sub-micron level with a greatly reduced dimension, the wet etching to remove the passivation layer
14
a
and the metal spacer
22
of
FIG. 1J
in no longer suitable. Moreover, the thin film resistor
12
a
will be covered by a conductive layer subsequently formed over the dielectric substrate
10
. It becomes difficult to change a bad thin film resistor
12
a
with a poor performance or to adjust the resistance of the thin film resistor
12
a.
Furthermore, the conventional method for fabricating the thin film resistor
12
a
includes several complicate processes. The conventional method needs several plasma etching processes, which needs several times of loading/unloading on the etching machine, and several types of etchant are necessarily used. The included processes are generally not compatible with the current facility of a wafer fab so that the fabrication cost is greatly increased. In addition, the plasma remains resulting from several plasma etching process may cause a plasma damage on the IC device. The electrical properties of the IC device is degraded, resulting in a poor performance of operation.
SUMMARY OF THE INVENTION
It is therefore an objective of the present invention to provide a method for fabricating a thin film resistor with a more simple fabrication process.
It is another objective of the present invention to provide a method for fabricating a thin film resistor. The method of the invention is compatible with current facility of a wafer fab so that fabrication cost can be reduced.
It is still another objective of the present invention to provide a method for fabricating a thin film resistor. The method of the invention includes fewer times of plasma etching processes so that a plasma damage is effectively avoided.
It is still yet another objective of the present invention to provide a method for fabricating a thin film resistor. The thin film resistor can be easily changed if it is necessary. The resistance of the thin film resistor can also be easily amended by, for example, a laser.
It is still yet another objective of the present invention to provide a method for fabricating a thin film resistor. The method includes no wet etching so that the thin film resistor is suitable for a fabrication level of deep sub-micron.
In accordance with the foregoing and other objectives of the present invention, a method for fabricating a thin film resistor is provided. The method includes forming a patterned conductive layer on a dielectric layer, which is formed over a substrate having a semiconductor device. The patterned conductive layer includes a first opening to expose a portion of the substrate. An insulating layer is formed over the substrate and is planarized, in which the first opening is filled by the insulating layer. Patterning the insulating layer forms a second opening that exposes the first opening and a portion of the patterned conductive layer at a plate, where a thin film resistor is desired to be formed. A thin film resistor conformal to the second opening is formed over the dielectric layer to at least cover the opening.
In the foregoing, the thin film resistor is formed by forming a conformal thin film resisting layer over the substrate, and removing a portion of the thin film resisting layer other than the second opening by, for example, plasma etching. The thin film resistor of the invention is formed on the conductive layer so that the thin film resistor can be easily formed. An amendment, if it is necessary, can be easily performed. The method includes no wet etching so that the method is very suitable for a fabrication with greatly reduced dimension.
REFERENCES:
patent: 4822749 (1989-04-01), Flanner et al.
patent: 5414404 (1995-05-01), Jeong et al.
Charles C. H. Wu & Associates
Fourson George
United Microelectronics Corp.
Wu Charles C. H .
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