Etching a substrate: processes – Forming or treating mask used for its nonetching function
Reexamination Certificate
2001-06-28
2002-11-05
Powell, William A. (Department: 1765)
Etching a substrate: processes
Forming or treating mask used for its nonetching function
C216S033000, C216S041000, C216S045000, C216S066000, C438S707000, C438S719000, C438S740000, C438S745000
Reexamination Certificate
active
06475399
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for fabricating a stencil mask and, more particularly, to method for producing a stencil mask that provides improved resolution by effectively reducing beam blur resulting from coulomb repulsion effects in the electron beam used in electron beam photolithography.
2. Description of the Related Art
FIG. 1A
is a general representation of elements of an electron beam imaging device for illustrating the general principles of electron beam photolithography.
The imaging device of
FIG. 1A
includes: a first stencil mask
2
through which an electron beam
1
is transmitted, a first shaping lens
3
situated under the first stencil mask
2
, a rotation correcting lenses
5
situated under the first shaping lens
3
, deflectors
4
situated in the rotation correcting lens
5
, a second shaping lens
6
situated under the rotation correcting lens
5
, a second stencil mask
7
situated under the second shaping lens
6
, an objective lens
8
situated under the second stencil mask
7
, and a wafer
9
upon which the image will be formed situated under the objective lens
8
.
FIG. 1B
is a plane view of the conventional stencil mask, and
FIG. 1C
is a side view of the conventional stencil mask.
A stencil mask
10
comprises silicon. The thickness of the silicon film depends on accelerated voltage. For example, the silicon film of 20 &mgr;m thickness is needed to block electrons accelerated at an energy of 50 KeV.
In general, a stencil mask
10
is fabricated to have features 25 times the size of the corresponding features that will be imaged on the wafer. Therefore if the target width of a feature is 0.1 &mgr;m on the wafer, the corresponding feature on the mask is 2.5 &mgr;m.
The stencil masks typically have a rectangular shape, with the size of the resulting pattern on the wafer
9
depending on the degree of overlap between the first stencil mask
2
and the second stencil mask
7
.
However, in a conventional stencil mask, as shown in
FIG. 2
, the image contrast on wafer
9
is reduced by beam blurring, also referred to as beam spreading, resulting from coulomb repulsion effects within the electron beam. As a result, the overall resolution of the imaging system will be reduced.
In order to prevent such beam blurring, a method has been proposed in which the number of electrons passing through the stencil masks is selectively reduced. However, if the wafer pattern is to be formed by a 0.25 &mgr;m feature on the mask having the aspect ratio of 100:1 and the silicon film of 20 &mgr;m thickness, the high aspect ratio renders the etching process much more difficult.
SUMMARY OF THE INVENTION
Therefore, an object of the present invention is to provide a method for fabricating stencil masks that can improve resolution by effectively reducing beam blur resulting from coulomb repulsion effects in the electron beam.
To accomplish the object, the inventors have developed a method for fabricating a stencil mask comprising the steps of:
A method for fabricating a stencil mask comprising the steps of:
preparing a first wafer consisting of
a first silicon film having an upper surface and a lower surface,
a silicon oxide film formed on the upper surface of the first silicon film, and
a second silicon film, formed on an upper surface of the silicon oxide film;
forming a first photoresist film pattern on the second silicon film;
etching the second silicon film to expose the silicon oxide film and to form a first etched surface;
removing the first photoresist film pattern;
forming a first silicon nitride film on the first etched surface of the second silicon film and lower surface of the first silicon film and side walls of the first and second silicon films and the silicon oxide film;
forming a second photoresist film pattern on the second silicon nitride film;
etching the first silicon nitride film, the first silicon film, and the silicon oxide film using the second photoresist film pattern film as an etching mask;
removing the second photoresist pattern film;
removing the first silicon nitride film to form a first opening through the first wafer;
forming a first metal film on all surfaces of the first wafer, including the lower surface of the first silicon layer and the upper surface of the second silicon layer, to complete a first mask;
preparing a second wafer consisting of
a third silicon film having an upper surface and a lower surface,
a titanium film formed on the upper surface of the third silicon film,
a titanium nitride film formed on an upper surface of the titanium film, and
a second metal film formed on an upper surface of the titanium nitride film;
forming a third photoresist film pattern on an upper surface of the second metal film;
etching the second metal film, the titanium nitride film, and the titanium film to expose the third silicon film using the third photoresist film pattern as an etching mask to form a second etched surface;
removing the third photoresist film pattern;
forming a second silicon nitride film on the second etched surface of the third silicon film, the lower surface of the third silicon film and side wall of the second wafer;
forming a fourth photoresist film pattern on the second silicon nitride film on the lower part of the third silicon film;
etching the second silicon nitride film and the third silicon film using a fourth photoresist film pattern as an etching mask;
removing the fourth photoresist film pattern;
removing the second silicon nitride film to complete a second mask to form a plurality of second openings through the second wafer;
aligning the first opening with the second openings; and
joining the first mask and the second mask by applying a conductive adhesive between the first metal layer of the first mask and the second metal layer of the second mask to form the stencil mask.
The material used to form the first mask is preferably one of the metals selected from a group including Au, W, Pt, and Pd.
The thickness of the first mask layer is preferably between about 500 and 300 Å.
The material used to form the second mask is preferably one of the metals selected from a group including Au, W, Pt, and Pd.
The thickness of the second mask is preferably between about 500 and 3000 Å.
The first through the fourth silicon nitride films are Si
3
N
4
and the first and the second masks are preferably joined together using a silver paste.
The above objects, and other features and advantages of the present invention will become more apparent after reading the following detailed description when taken in conjunction with the drawings.
REFERENCES:
patent: 5302240 (1994-04-01), Hori et al.
patent: 6150280 (2000-11-01), Yamashita
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