Method for fabricating a stacked capacitor cell in semiconductor

Details Method for fabricating a stacked capacitor cell in semiconductor Method for fabricating a stacked capacitor cell in semiconductor

1994-12-30

1996-02-20

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 60, 437919, H01L 2170, H01L 2700

Patent

active

054928508

ABSTRACT:
There are disclosed a semiconductor memory device and a method for fabrication thereof. The semiconductor memory device comprises a storage electrode connected with a source region of a MOSFET and formed with a wider area than that of the mask therefor, having a structure which is comprised of a spacer-shaped hollow cylinder of impurity-doped polysilicon containing three separate solid cylinders of impurity-doped polysilicon therein, a column filling the contact hole, and a disc-like plate, the spacer-shaped hollow cylinder and the three separate cylinders standing on the disc-like plate from which the column is extended toward the active region. It has an advantage of increasing the efficient area of a storage electrode of a semiconductor device, thereby improving the capacitance. In addition, it becomes more reliable and thus, its price increases.

REFERENCES:
patent: 5389560 (1995-02-01), Park
patent: 5403766 (1995-04-01), Miyaka

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