Method for fabricating a stack capacitor

Semiconductor device manufacturing: process – Making passive device – Stacked capacitor

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438253, 438255, 438964, H01L 2170

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06004859&

ABSTRACT:
A method for fabricating a stack capacitor with a hemi-spherical grain (HSG) structure is provided. A dielectric layer with a cave is first formed on a substrate. A conformal multi-layer amorphous silicon layer with low dopant concentration is formed over the substrate to cover the cave surface. An amorphous silicon layer with a sufficiently high dopant concentration is formed on the multi-layer amorphous silicon layer to fill the cave. After a planarization process, a remaining portion of the multi-layer amorphous silicon layer and the amorphous silicon layer form a storage node to fill the cave. The dielectric layer is removed to expose the storage node. A HSG is formed on the exposed surface of the storage node. An annealing process is performed to obtain a uniform dopant concentration. A dielectric thin film is formed over the storage node and the HSG layer. An upper electrode is formed to accomplish the stack capacitor.

REFERENCES:
patent: 5340765 (1994-08-01), Dennison et al.
patent: 5438011 (1995-08-01), Blalock et al.
patent: 5663085 (1997-09-01), Tanigawa
patent: 5741722 (1998-04-01), Lee
patent: 5907773 (1999-06-01), Ikemasu et al.

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