Metal treatment – Compositions – Heat treating
Patent
1976-02-13
1977-04-05
Rutledge, L. Dewayne
Metal treatment
Compositions
Heat treating
29578, 148174, 148175, 357 49, 357 50, 357 54, 357 59, 357 91, 427 93, 427 94, H01L 2176, H01L 21265
Patent
active
040160076
ABSTRACT:
A polycrystalline silicon layer is deposited by chemical vapor deposition method at a predetermined location on an oxide film grown by thermal oxidation on a surface of a monocrystal silicon substrate. Nitrogen ions are implanted in the outer surface of the polycrystalline silicon layer and the exposed surface of the oxide film. The whole surfaces are oxidized by wet oxidation so as to form a thick oxide layer at the surface of the oxide film which is not covered by the polycrystalline silicon layer.
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Chang et al., "Fabrication for Junction Insulating Gate FET" I.B.M. Tech. Discl. Bull., vol. 13, No. 9, Feb. 1971, p. 2503.
Chou, N.J., "Self-Registered Si electrode FET" Ibid., vol. 14, No. 1, June 1971, p. 250.
Bassous, E., "Fabricating Submicrometer Silicon Devices" Ibid., vol. 15, No. 6, Nov. 1972, pp. 1823-1825.
Ashikawa Mikio
Koyanagi Mitsumasa
Usui Hiroo
Wada Yasuo
Hitachi , Ltd.
Rutledge L. Dewayne
Saba W. G.
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