Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1998-10-01
1999-12-14
Chaudhuri, Olik
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
H01L 2176
Patent
active
060017082
ABSTRACT:
A method for fabricating a STI structure includes a pad oxide layer and a hard masking layer first formed over a semiconductor substrate. A trench is formed in the substrate. A first insulating layer is formed over the substrate. The surface of the first insulating layer within the trench is be between the hard masking layer surface and the semiconductor substrate surface. An insulating cap layer is formed over the first insulating layer with a hardness at least about as large as the hard masking layer. A second insulating layer is formed over the insulating cap layer. A chemical mechanical polishing (CMP) process is performed, using the hard masking layer as a polishing stop, to planarize over the substrate. A process of dipping the substrate into a HF acid solution is performed to remove the hard masking layer and the pad oxide layer, in which the process also simultaneously removes the remaining second insulating layer and the remaining insulating cap layer. The STI structure is accomplished with a significant avoidance of dishing and microscratch.
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Hung Tsung-Yuan
Liu Ming-Tsung
Chaudhuri Olik
Duy Mai Anh
Huang Jiawei
Patents J. C.
United Semiconductor Corp.
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