Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2005-11-15
2005-11-15
Blum, David S. (Department: 2813)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S700000
Reexamination Certificate
active
06964912
ABSTRACT:
A method for fabricating a semiconductor structure includes providing a semiconductor substrate, providing a plurality of trenches in the semiconductor substrate using a first hard mask, and causing the hard mask to recede by a predetermined distance with respect to the trench wall at the top side of the semiconductor substrate for forming a first hard mask that has been caused to recede. An isolation trench structure is provided in the semiconductor substrate using a second hard mask, the isolation trench structure subdividing the first first hard mask that has been caused to recede along rows into strip sections and the strip sections of adjacent rows being arranged offset with respect to one another. The receding process results in a reduction of an overlap region between two strip sections of adjacent rows in comparison with an overlap region which would be present without the receding process. The second hard mask is removed and the isolation trench structure is filled and planarized with a filling material using the first hard mask subdivided into the strip sections.
REFERENCES:
patent: 6873000 (2005-03-01), Goldbach et al.
patent: 2003/0045051 (2003-03-01), Pohl et al.
patent: 2003/0072198 (2003-04-01), Goldbach et al.
patent: 101 39 430 (2003-03-01), None
patent: 101 39 431 (2003-03-01), None
patent: 101 49 199 (2003-04-01), None
Efferenn Dirk
Moll Hans-Peter
Blum David S.
Infineon - Technologies AG
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