Method for fabricating a semiconductor memory device having a st

Fishing – trapping – and vermin destroying

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437 60, 437919, H01L 2170, H01L 2700

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active

054686709

ABSTRACT:
A semiconductor memory device capable of obtaining a sufficient charge storage capacity and yet having a reduced occupied memory cell area. The semiconductor memory device includes a field effect transistor formed on a semiconductor substrate, an interlayer insulating film formed over the field effect transistor, a first charge storage electrode pattern having a plane plate shape and formed over the interlayer insulating film such that it is electrically connected with the field effect transistor, a second charge storage electrode pattern having a double cylindrical structure and formed over the first charge storage electrode pattern such that it is electrically connected with the first charge storage electrode pattern, and a dielectric film and a plate electrode sequentially formed over the entire exposed surfaces of the first and second charge storage electrode patterns.

REFERENCES:
patent: 5137842 (1992-08-01), Chan et al.
patent: 5389560 (1995-02-01), Park

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