Fishing – trapping – and vermin destroying
Patent
1994-06-27
1995-10-17
Quach, T. N.
Fishing, trapping, and vermin destroying
437 20, 437 34, 437 57, 437193, 437956, H01L 21265, H01L 21283
Patent
active
054591015
ABSTRACT:
A semiconductor device comprising a semiconductor substrate, an insulating film formed on the semiconductor substrate, and a polycide film including a polysilicon layer and a silicide layer formed on the insulating film. The polysilicon layer includes a p-type region having p-type impurities diffused therein and an n-type region having n-type impurities diffused therein. The p-type impurities are implanted into the silicide layer in order to have a substantially uniform concentration over the entire portion thereof, so that the p-type impurities in the p-type region of the polysilicon layer do not diffuse into the silicide film by a post heat treatment.
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"Technology Limitations for N.sup.+ /P+Polycide Gate CMOS due to Lateral Dopant Diffusion in Silicide/Polysilicon Layers"; by Charles L. Chu et al.; IEEE Electron Device Letters, vol. 12, No. 12; Dec. 1991; pp. 696-698.
Fujii Toyokazu
Naito Yasushi
Matsushita Electric - Industrial Co., Ltd.
Quach T. N.
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