Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2006-04-18
2006-04-18
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S750000, C257S751000, C257S758000
Reexamination Certificate
active
07030495
ABSTRACT:
A method for fabricating a low k, ultra-low k, and extreme-low k multilayer interconnect structure on a substrate in which the interconnect line features are separated laterally by a dielectric with vertically oriented nano-scale voids formed by perforating it using sub-optical lithography patterning and etching techniques and closing off the tops of the perforations by a dielectric deposition step. The lines are supported either by solid or patterned dielectric features underneath. The method avoids the issues associated with the formation of air gaps after the fabrication of conductor patterns and those associated with the integration of conventional low k, ultra-low k and extreme low k dielectrics which have porosity present before the formation of the interconnect patterns.
REFERENCES:
Guarini et al., “Optimization of Diblock Copolymer Thin Film Self-Assembly”, Advance Materials, vol. 4, No. 18, Sep. 16, 2002.
Black et al., “Integration of Self-Assembled Diblock Copolymers for Semiconductor Capacitor Fabrication” , Applied Physics Letters, vol. 79, No. 3, Jul. 16, 2001.
Colburn Matthew E
Nitta Satyanarayana V
Purushothaman Sampath
International Business Machines - Corporation
Morris, Esq. Daniel P.
Ohlandt Greeley Ruggiero & Perle L.L.P.
Pham Long
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