Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Patent
1997-06-24
1998-05-26
Nguyen, Tuan H.
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
438253, 438255, 438398, 148DIG14, H01L 2120
Patent
active
057563888
ABSTRACT:
A method for fabricating a capacitor on a semiconductor substrate is disclosed. The method includes forming successively, a TEOS layer, a first dielectric layer and an insulating layer over the semiconductor substrate. Then a window filled with a polysilicon plug through the three layers is formed. The insulating layer is patterned by an HSG-Si layer deposited thereon, thereby forming a polysilicon rod and a plurality of insulating rods. A conducting polysilicon layer is formed over the polysilicon rod and the plurality of insulating rods when the HSG-Si layer is removed. The first dielectric layer and the insulating rods are removed, thereby forming a rake-shaped electrode which includes the polysilicon rod and the conducting polysilicon layer. Moreover, a second dielectric layer and another electrode are formed over the rake-shaped electrode.
REFERENCES:
patent: 5464791 (1995-11-01), Hirota
patent: 5480824 (1996-01-01), Jun
patent: 5482882 (1996-01-01), Lur et al.
patent: 5482885 (1996-01-01), Lur et al.
patent: 5492848 (1996-02-01), Lur et al.
patent: 5604148 (1997-02-01), Lur
Nguyen Tuan H.
Powerchip Semiconductor Corp.
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