Method for fabricating a planar field oxide region

Details Method for fabricating a planar field oxide region Method for fabricating a planar field oxide region

1996-08-22

1997-07-29

Dang, Trung

Fishing, trapping, and vermin destroying

437 70, 437968, H01L 2176

Patent

active

056521774

ABSTRACT:
The present provides a method of manufacturing a planar field isolation region using a polysilicon layer as a polishing stop. The method begins by sequentially forming an insulating layer 12, a polysilicon layer 14 and a nitride layer 16 over a primary surface of a substrate 10. The polysilicon layer 14 and the nitride layer 16 are patterned to form a first opening exposing insulating layer 12. A field isolation region is grown to a first thickness within the first opening. The nitride layer is removed. The field isolation region is polished so that the top surface of the field isolation region is coplanar with the top surface of the polysilicon layer. Next the polysilicon layer is removed by either of two embodiments. First, the polysilicon is removed by a second (CMP) polishing step which uses a different slurry than the field oxide CMP. The second CMP step the exposed surface of the field isolation region is coplanar with an exposed surface of the polysilicon layer. Second, the polysilicon layer can be removed by a selective etch.

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patent: 5470783 (1995-11-01), Chiu et al.
patent: 5472905 (1995-12-01), Paek et al.
patent: 5554560 (1996-09-01), Hsue et al.

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