Fishing – trapping – and vermin destroying
Patent
1986-12-19
1988-11-15
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437176, 437912, 437944, 437203, 437126, 437105, 437153, 437041, 437DIG984, 148DIG145, 148142, H01L 21302
Patent
active
047849673
ABSTRACT:
A method of fabricating a field-effect transistor is disclosed wherein only two masking steps are used in the development of the device. The semiconductor wafer used in the process has a non-alloyed contact at its top surface, that is, a contact which does not require alloying temperatures in excess of 200 degrees C. The first mask is used to create conventional mesa structures which isolate each individual field-effect transistor from its adjacent neighbors. A second mask is utilized to define the source and drain electrodes and also to create a gap through which the gate electrode structure is fabricated. By using a single mask for creation of both the source and drain electrodes and the gate structure, very close tolerances are obtained between the gate structure and the source and drain regions.
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Cunningham John E.
Schubert Erdmann F.
Tsang Won-Tien
American Telephone and Telegraph Company AT&T Bell Laboratories
Dubosky Daniel D.
Hearn Brian E.
Pawlikowski Beverly Ann
Ranieri Gregory C.
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