Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Patent
1997-06-06
1999-04-06
Powell, William
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
216 2, 216 51, 216 67, 216 52, 438462, 438738, H01L 2100
Patent
active
058918086
ABSTRACT:
The present invention provides a method of fabricating a die seal. The die seal comprises a buffer area being adjacent to a die, a buffer space being adjacent to a scribe line, and a seal ring located between the buffer area and the buffer space. The seal ring is stacked by at least one metal layer and at least one dielectric layer. A passivation layer is formed and covers entire the die seal. The method comprises forming an amorphous silicon film on a top metal layer prior to the step of forming the passivation layer, and removing the dielectric layer on the buffer space by applying the amorphous silicon film as an etch stop layer in the step of etching the passivation layer to enhance the robustness of the die seal from damage by a lateral stress when a wafer is sawed. When the dielectric layer is made of SiO.sub.2, a plasma containing CF.sub.4 and H.sub.2. can be utilized in the step of etching the passivation layer. Because the plasma has an extremely high etching selectivity ratio, the SiO.sub.2 on the buffer space can be completely removed.
REFERENCES:
patent: 5772906 (1998-06-01), Abraham
Chang Gene Jiing-Chiang
Chen Chun-Cho
Powell William
Winbond Electronics Corp.
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