Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board
Patent
1993-09-29
1995-10-10
Beck, Shrive
Coating processes
Electrical product produced
Integrated circuit, printed circuit, or circuit board
427294, 427296, 427282, 427299, 427384, B05D 512
Patent
active
054569427
ABSTRACT:
An improved method for fabricating a circuit element through a substrate permits fabrication of large geometry vias between substrate sides. The improved method includes disposing a substrate (327) between two compressible layers (317, 339). Each of the layers (317, 339) has at least one aperture (345, 321) disposed therethrough. The substrate (327), has at least one via (333) aligned between the apertures (345, 321) where the via has an area smaller than an area of the apertures (345, 321). Next, a coating, preferably a liquid circuit element material (351) is disposed into one of the apertures (321) of one of the two compressible layers (339). A pressure (405) is applied between the two compressible layers (317, 339) causing the liquid circuit element material (351) to flow between the two compressible layers (317, 339), thereby coating the at least one via (333) of the substrate (327), thus providing an interconnect (609, 611) of the coating through the substrate (327). The compressed layers (317, 339) confine the spreading of the liquid circuit element material (351). Preferably, the substrate (327) is then cured or fired, thereby changing the liquid circuit element material (351) into a solid state.
REFERENCES:
patent: 3999004 (1976-12-01), Chirino
patent: 4323593 (1982-04-01), Tsunashima
patent: 4642160 (1987-02-01), Burgess
patent: 4964948 (1990-10-01), Reed
Bebak James E.
Saar Loren E.
Sardina Frank A.
Vinci Joseph J.
Beck Shrive
Hopman Nicholas C.
Maiorana David M.
Motorola Inc.
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