Method for fabricating a chip carrier which includes at least on

Details Method for fabricating a chip carrier which includes at least on Method for fabricating a chip carrier which includes at least on

1998-01-28

2000-09-05

Arbes, Carl J.

Metal working

Method of mechanical manufacture

Electrical device making

430156, 430167, 4302801, 29825, H01K 310

Patent

active

061124087

ABSTRACT:
A method for fabricating a chip carrier, e.g., a printed circuit board, which includes at least one photo-via is disclosed. This method inlcudes the steps of forming a first dielectric layer on a substrate. A second dielectric layer, having a greater photosensitivity than the first dielectric layer, is formed on the first dielectric layer. Preferably, this second dielectric layer has a relatively low optical absorptivity at the wavelengths to be used during exposure. Then, at least the second dielectric layer is selectively exposed to actinic radiation. The second and first dielectric layers are then developed, to form one or more desired photo-vias.

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"Encapsulated Dendrite Electrical Interconnect for Surface Mount Applications", vol. 38, No. 08, IBM Technical Disclosure Bulletin, Aug., 1995, pp. 267-268.

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