Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Reexamination Certificate
1999-10-27
2001-02-20
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
C438S238000, C438S003000, C438S240000, C438S592000, C438S735000
Reexamination Certificate
active
06190991
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The present invention lies in the field of semiconductor technology and, more specifically, relates to a method for fabricating a capacitor.
In order to further increase the integration level in semiconductor modules, materials having a high dielectric constant (high-&egr;)or having ferroelectric properties will be used to an increased extent in the future. By using these materials, it is hoped that a higher storage density (charge/area) will be gained in comparison with the capacitor dielectrics (oxide
itride/oxide) used heretofore. A preferred material having a high dielectric constant is barium strontium titanate (BST) for example. Examples of ferroelectric materials that ought to be mentioned in the context are strontium bismuth tantalate (SBT) and also lead zirconium titanate (PZT).
However, the process integration of these materials entails a series of problems. Particular difficulties are posed by the deposition. The materials used as capacitor dielectric (metal oxide layers in ceramic form) can, for example, be applied conformally to a semiconductor surface by means of CVD deposition processes. The metal oxide layers are thereby applied inter alia directly to a first electrode of a storage capacitor. The material used for that electrode must be resistant to oxygen, since the metal oxide layer is deposited in an oxidizing atmosphere. Platinum and ruthenium, among others, have proved to be suitable electrode materials. One disadvantage of these materials, however, is that they exhibit a high level of diffusion into silicon or form metal silicide layers with silicon. Those layers can have an irreversible influence on the method of operation of active components.
Therefore, it is usual for a so-called barrier layer to be arranged underneath the electrode materials. The barrier layer prevents the electrode materials from diffusing into the silicon situated underneath. Barrier layers of this type are composed of a titanium/titanium nitride combination, for example.
It is unfavorable, however, that these barrier layers are sensitive to oxidation and can easily oxidize in the course of the CVD deposition of the metal oxide layers. Particularly when titanium is used as a constituent part of the barrier layer, there is the risk, therefore, that the usually conductive barrier layer will become insulating as a result of the oxidation. It is thus no longer possible to make contact with the first (lower) electrode of the storage capacitor.
In order to prevent the oxidation of the barrier layer during the CVD deposition, U.S. Pat. Nos. 5,883,781 and 5,943,547 (European patent application EP 0 739 030 A2), for example, propose the formation of lateral insulation webs around the patterned barrier layer. The insulation webs, which are composed of silicon nitride, are formed after the common etching of the lower electrode and also of the barrier layer by means of conformal deposition of a silicon nitride layer and anisotropic etching thereof. The silicon nitride layer thereby essentially remains in the lower region of the electrode, that is to say only in the region of the barrier layer.
Lateral insulation webs around the barrier layer are also proposed in U.S. Pat. No. 5,656,852. The insulation webs, which may be composed of silicon dioxide or silicon nitride are formed there prior to the deposition of the lower metal electrode.
A common feature of all of the prior art insulation webs is that they are formed from a conformally deposited insulation layer with subsequent anisotropic etching. The necessary etching step, in particular, may thereby attack the barrier layer and/or the electrode or one of these two layers may be contaminated by the insulation layer.
The contamination of the metal electrode, in particular, is disadvantageous since the material properties of the metal oxide layer to be applied to the metal electrode depend to a great extent on the quality of the interface between metal electrode and metal oxide layer.
By contrast, insulation webs formed in situ are disclosed in U.S. Pat. No. 5,554,844, in which a titanium nitride layer serving as a barrier is oxidized in its side regions prior to the deposition of the capacitor dielectric. Since the oxidation of the barrier layer progresses rapidly in particular with respect to the adjoining metal electrode, problems concerning the adhesion of the metal electrode on the barrier may arise.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a capacitor fabrication method, which overcomes the above-mentioned disadvantages of the heretofore-known devices and methods of this general type and which precludes contamination of layers already present to the greatest possible extent, ensures reliable adhesion of the metal electrode, and is simple to realize in technological terms.
With the foregoing and other objects in view there is provided, in accordance with the invention, a method for fabricating a capacitor, which comprises the following steps:
providing a substrate with a silicon-containing oxide layer, a barrier layer on the oxide layer, and an electrode layer on the barrier layer;
etching, region by region, the electrode layer and the barrier layer (either in a common or in subsequent etching steps), for forming at least one capacitor electrode, and thereby attacking the oxide layer underneath the barrier layer at least up to a predetermined degree;
CVD-depositing at least one metal in an oxidizing atmosphere and at a given deposition temperature to form a metal oxide layer, and thereby producing in situ a substantially amorphous passivation edge web, in the course of the CVD deposition, laterally of the barrier layer between the barrier layer and the metal oxide layer.
In accordance with an added feature of the invention, the metal oxide layer is thermally annealed to form a poly-crystalline layer.
The invention is based on the insight that given a suitable selection of the process parameters, in particular with regard to the etching operation and the CVD deposition, a self-aligned passivation edge web is formed around the barrier layers. For this purpose, it is necessary, on the one hand, that in the course of the etching of the electrode and of the barrier layer or in the course of an additional etching step, the oxide layer situated under the barrier layer is attacked up to a specific degree. This etching of the oxide layer results in a degree of material erosion of the oxide layer laterally with respect to the already etched electrode and the barrier layer. In this case, part of the eroded material is redeposited on the side walls of the barrier layer and also of the electrode layer. In the course of the subsequent deposition of the metal oxide layer from a CVD vapor phase, an amorphous passivation edge web is formed from the material that is redeposited there, said passivation edge web protecting the barrier layer against oxidation during the further CVD deposition. Since this passivation edge web is formed during the CVD deposition, it is possible for the barrier layer to be oxidized up to a certain degree at its edges. As a result of the passivation edge web, which forms relatively rapidly, however, advancing oxidation of the barrier layer is retarded with the increasing formation of said passivation edge web, so that it is possible to talk of a self-retarding oxidation barrier.
With the deposition of the metal oxide layer advancing further, the further formation of the passivation edge web is also retarded. The reason for this, on the one hand, is that only a limited quantity of the deposited metal oxides can be taken up by the redeposited material. Another reason is to be found in the increasing coverage of the redeposited material with the deposited metal oxides. In principle, the passivation edge web that is produced has a certain material thickness depending on the quantity of redeposited material and the process conditions selected.
In addition to the deposited material, on the other hand, the vapor phase itself also contributes to th
Beitel Gerhard
Fritsch Elke
Wendt Hermann
Greenberg Laurence A.
Lerner Herbert L.
Siemens Aktiengesellschaft
Smith Matthew
Stemer Werner H.
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