Method for fabricating a bipolar transistor having self aligned

Details Method for fabricating a bipolar transistor having self aligned Method for fabricating a bipolar transistor having self aligned

1988-03-14

1989-04-25

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 31, 437 89, 437 92, 437191, 437238, 437241, 148DIG10, 148DIG11, 148DIG117, H01L 21265

Patent

active

048247944

ABSTRACT:
A bipolar transistor having self-aligned base and emitter regions is fabricated in a silicon layer which is epitaxially grown on a substrate so as to fill up a cavity formed through a polysilicon layer deposited on the substrate. The polysilicon layer is doped with impurities for creating an extrinsic base region in the epitaxially grown silicon layer and is insulated from the emitter electrode by a dielectric layer formed thereon. The dielectric layer can be provided by selectively oxidizing the polysilicon layer. Thus, the step formed at the emitter electrode is small and equal to the thickness of the dielectric layer, about 3000 .ANG., for example, thereby eliminating the faulty step coverage in the prior art self-aligned bipolar transistor usually having the step as large as 1 micron.

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