Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Sidewall base contact
Reexamination Certificate
2002-06-03
2003-10-21
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Sidewall base contact
C257S572000
Reexamination Certificate
active
06635545
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a method for fabricating a bipolar transistor.
Such a method is disclosed, for example, in the commonly assigned U.S. Pat. No. 5,498,567 and in the corresponding European patent EP 0 535 350 B1). A highly n-doped connection region of a collector is produced on a p-doped substrate made of silicon. The lightly n-doped collector made of silicon is applied above the terminating region of the collector. An insulating structure is produced in the substrate, which structure comprises trenches filled with insulation material and channel stop regions which are arranged below said trenches and are highly p-doped. The insulating structure surrounds the bipolar transistor to be produced laterally within the substrate. There are produced on the substrate a first SiO
2
layer, above that a polysilicon layer, above that a second SiO
2
layer and above that a layer made of silicon nitride. Afterward, by masked etching, a first depression reaching as far as the first insulating layer is produced, and a second depression reaching as far as the connection region of the collector is produced. In order to produce an auxiliary layer, silicon nitride is deposited and etched back, so that lateral areas of the first depression and of the second depression remain covered by the auxiliary layer and bottoms of the depressions are uncovered. Afterward, SiO
2
is etched isotropically, so that a part of the first SiO
2
layer is removed. In this case, the collector is uncovered below the first depression. By means of selective epitaxy, the removed part of the first SiO
2
layer is replaced by a p-doped base. Afterward, a third SiO
2
layer and a second polysilicon layer are deposited. The second polysilicon layer is etched back anisotropically selectively with respect to the third SiO
2
layer, thereby producing spacers. Afterward, uncovered parts of the third SiO
2
layer are removed by isotropic etching selectively with respect to the spacers. Afterward, a third polysilicon layer is deposited and etched back, so that an emitter is produced in the first depression and a contact to the collector is produced in the second depression. A third depression reaching as far as the first layer made of polysilicon is produced with the aid of masked etching. Afterward, conductive material is deposited and planarized, so that a contact to the emitter is produced in the first depression, a further contact to the collector is produced in the second depression and a contact to the base is produced in the third depression.
The so-called base resistance, which is the resistance between the base and a line which is connected to the base via the contact to the base, determines, besides the transition frequency and the base-collector capacitance, important characteristic quantities of the bipolar transistor, such as its maximum oscillation frequency, its gain, its minimum noise figure, its gate delay times, etc. The base resistance is preferably small.
Resistances formed between the emitter and a line connected thereto (“external emitter resistance”) and between the collector and a line connected thereto (“external collector resistance”) are readily used in integrated circuit configurations to realize ohmic load resistances. Thus, these resistances should not be too small.
It is known to reduce a boundary resistance between polysilicon and a metal by siliconizing the polysilicon, i.e. providing it with a silicide layer.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a method of fabricating a bipolar transistor and a method of fabricating an integrated circuit configuration having at least one bipolar transistor of the novel type, which overcomes the above-mentioned disadvantages of the heretofore-known devices and methods of this general type and which provides for a bipolar transistor in which the base resistance is lower than the external emitter resistance and to an integrated circuit configuration having such a bipolar transistor.
With the foregoing and other objects in view there is provided, in accordance with the invention, a method of fabricating a bipolar transistor, which comprises:
producing a collector doped by a first conductivity type in a substrate of semiconductor material;
producing a first insulating layer covering the collector on the substrate;
producing a polysilicon layer doped by a second conductivity type, opposite the first conductivity type, on the first insulating layer;
producing a second insulating layer on the polysilicon layer;
forming a first depression above the collector, cutting through the second insulating layer and the polysilicon layer;
subsequently producing a first auxiliary layer and a second auxiliary layer above the first auxiliary layer, and forming the first and second auxiliary layers so thin as not to fill the first depression;
anisotropically etching the second auxiliary layer until the first auxiliary layer is uncovered;
isotropically etching the first auxiliary layer selectively with respect to the second auxiliary layer until a part of the first insulating layer is uncovered;
removing a part of the first insulating layer by isotropic etching selectively with respect to the first auxiliary layer, thereby uncovering parts of the polysilicon layer and parts of the collector;
replacing the removed part of the first insulating layer with a base by selective epitaxy of silicon in situ-doped by the second conductivity type;
subsequent to producing the base, producing a third auxiliary layer;
producing spacers in the first depression on the third auxiliary layer, by deposition and etching-back of material;
isotropically etching the third auxiliary layer selectively with respect to the spacers, and uncovering the base;
depositing polysilicon doped by the first conductivity type and, thereabove, an isolating layer, and jointly patterning to produce an emitter covered by the isolating layer, partly arranged in the first depression, adjoining the base, and partly overlapping the second insulating layer;
anisotropically etching the second insulating layer selectively with respect to the isolating layer until the polysilicon layer is uncovered;
producing a silicide layer on the polysilicon layer but not on the isolating layer;
producing a base contact on the silicide layer; and subsequent to producing the silicide layer, at least partly removing the isolating layer, and producing an emitter contact on the emitter.
In other words, the object is achieved by means of a method for fabricating a bipolar transistor in which a collector doped by a first conductivity type is produced in a substrate made of semiconductor material. A first insulating layer covering the collector is produced on the substrate. A layer made of polysilicon doped by a second conductivity type, opposite to the first conductivity type, is produced on the first insulating layer. A second insulating layer is produced on the layer made of polysilicon. A first depression is produced, which cuts through the second insulating layer and the layer made of polysilicon and is arranged above the collector. After the production of the first depression, a first auxiliary layer and, above the latter, a second auxiliary layer are produced, which are so thin that they do not fill the first depression. The second auxiliary layer is etched anisotropically until the first auxiliary layer is uncovered. The first auxiliary layer is etched isotropically selectively with respect to the second auxiliary layer until a part of the first insulating layer is uncovered. A part of the first insulating layer is removed by isotropic etching selectively with respect to the first auxiliary layer, so that parts of the layer made of polysilicon and parts of the collector are uncovered. By means of selective epitaxy of silicon in situ-doped by the second conductivity type, the removed part of the first insulating layer is replaced by a base. A third auxiliary layer is produced after the production of the base. On the first auxiliary layer, spacers a
Böck Josef
Franosch Martin
Klein Wolfgang
Meister Thomas
Schäfer Herbert
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