Method for fabricating a BiCMOS device

Details Method for fabricating a BiCMOS device Method for fabricating a BiCMOS device

1987-10-08

1989-05-02

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 56, 357 43, 148DIG9, H01L 2170

Patent

active

048267830

ABSTRACT:
This invention provides a method for fabricating a BiCMOS device, in which said device has a Si substrate of a first conductivity in which there is formed a first substrate region of a second conductivity for a bipolar transistor, a second substrate region of said second conductivity for a first MOSFET, having a source and drain of the first conductivity, and in which a part of said Si substrate is formed to provide a second MOSFET which has a source and drain of the second conductivity. A first nitride layer is used to prevent the substrate under a masking layer from oxidizing during the following oxidation processes, wherein the masking layer is composed of a oxide layer and the nitride layer. After some processes, the masking layer is removed. Implanting As impurities, a new oxide layer and a new nitride layer are deposited, wherein the role of the nitride layer is to protect a shallow emitter region. After that, a new clean oxide layer is grown for a gate insulator layer, and controllable clean gate oxide layer is obtained.

REFERENCES:
patent: 3920484 (1975-11-01), Ogura
patent: 4045250 (1977-08-01), Dingwall
patent: 4325180 (1982-04-01), Curran
patent: 4503603 (1985-03-01), Blossfeld
patent: 4637125 (1987-01-01), Iwasaki et al.
Choi et al., "A Cost-Performance Optimized BiCMOS Process for LSI Circuit Applications", Presented at First Internation BiCMOS Symposium, ECS Meeting, Philadelphia, May, 1987.

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