Method for fabricating a 1-chip microcomputer

Details Method for fabricating a 1-chip microcomputer Method for fabricating a 1-chip microcomputer

1986-03-06

1989-05-23

Lall, Parshotam S.

Boots, shoes, and leggings

364489, 364488, 357 40, G06F 1100

Patent

active

048336203

ABSTRACT:
A method for fabricating a 1-chip microcomputer accompanied by a so-called evaluation chip provided an interface for an external memory device in which a program to be written in a ROM of the 1-chip microcomputer is stored and evaluated in advance. The method includes producing masks for fabricating the chips of a 1-chip microcomputer and replacing ROM patterns in the masks by patterns for forming the interface means. Also included are the steps of adding patterns for additional bonding pads and wiring to the masks, where the additional bonding pads are arranged in an array at the outermost periphery of the evaluation chip, and the additional wiring connecting the additional bonding pads to the interface bonding pads which are formed at the inner region of the evaluation chip so as to have the same arrangement as in the corresponding 1-chip microcomputer chips. Patterns for the additional bonding pads and the connections to the additional bonding pads are usually added to the wiring patterns formed in the uppermost layer of a multiple-layer wiring configuration in the 1-chip microcomputer.

REFERENCES:
patent: 4467420 (1984-08-01), Murakami et al.
patent: 4513400 (1985-04-01), Masaki
patent: 4670838 (1987-06-01), Kawata
patent: 4688070 (1987-08-01), Shiotari et al.
patent: 4701886 (1987-10-01), Sakakibara et al.
Patent Abstracts of Japan, vol. 9, No. 240 (E-345), 1963, 26th Sep. 1985; & JP-A-60 89 955 (Mitsubishi Denki K.K.), 05-20-1985.

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