Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
Reexamination Certificate
2003-01-15
2008-09-02
Rodriguez, Paul L (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Circuit simulation
C716S030000
Reexamination Certificate
active
07421383
ABSTRACT:
Semiconductor device junction simulation is carried out utilizing models that are developed with series resistance extractions that improve their fidelity particularly in the high current regions of device operation. The models may also be tailored to account for geometric considerations of the semiconductor devices thereby allowing for a more flexible model and simulation by providing for geometric scaling capabilities.
REFERENCES:
patent: 5825673 (1998-10-01), Watanabe
patent: 5966527 (1999-10-01), Krivokapic et al.
patent: 2002/0133785 (2002-09-01), Kondo
Emira et al., May 26-29, 2002, IEEE, Design tradeoffs of CMOS current mirrors using one-equation for all-region model, pp. V-45-V-48.
Moon et al. Mar. 1991, New short-channel n-MOSFET current-voltage model in strong inversion and unified parameter extraction method, pp. 592-602.
Sheu et al., 1987, IEEE, BISIM: Berkeley short-Channel IGFET Model for Most Transistors.
Weste et al, 1994, Addison Wesley, Second eidtion, Principles of CMOS VLSI design, a systems perspectives. pp. 176-180.
Weste et al., 1993, Addison-Wesley Publishing Company, Second Edition, “Principles of CMOS VLSI design”, p. 181-184.
Weste et al., 1993, Addison-Wesley Publishing Company, Second Edition, “Principles of CMOS VLSI design”, p. Vii, 185-186.
Pmlbey et al. Aug. 1988, IEEE, Simple mesurement of the properties of a distributed resistor-Capacitor line., pp. 1393-1395.
Her Jaw-Kang
Hsiao Cheng
Su Ke-Wei
Kim Eunhee
Rodriguez Paul L
Taiwan Semiconductor Mfg Co Ltd
Tung & Associates
LandOfFree
Method for extracting and modeling semiconductor device... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for extracting and modeling semiconductor device..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for extracting and modeling semiconductor device... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3977642