Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
Reexamination Certificate
2011-08-30
2011-08-30
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Logic design processing
C716S110000
Reexamination Certificate
active
08010919
ABSTRACT:
The invention relates to a method for rating the quality of a computer program whose execution involves an integrated circuit's input data and output data being influenced, comprising(a) provision of a mutated integrated circuit which is obtained by incorporating one or more functional mutations into the (unmutated) integrated circuit;(b) influencing of the mutated integrated circuit's input data and output data, with the output data from the mutated integrated circuit being recorded;(c) comparison of the output data obtained in this manner from the mutated integrated circuit with the output data which the computer program expects when the unmutated integrated circuit is influenced; and(d) rating of the quality of the computer program on the basis of the comparison results.
REFERENCES:
patent: 4228537 (1980-10-01), Henckels et al.
patent: 5831996 (1998-11-01), Abramovici et al.
patent: 6769107 (2004-07-01), Watkins
patent: 7007250 (2006-02-01), Bapat et al.
patent: 7402897 (2008-07-01), Leedy
patent: 2004/0216081 (2004-10-01), Wells et al.
Grosse Joerg
Hampton Mark
Chiang Jack
McDermott Will & Emery LLP
Parihar Suchin
Springsoft USA, Inc.
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