Method for evaluating impurity concentrations in...

Semiconductor device manufacturing: process – With measuring or testing

Reexamination Certificate

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Details

C438S471000, C438S476000, C438S928000

Reexamination Certificate

active

06620632

ABSTRACT:

TECHNICAL FIELD
The present invention relates to semiconductor processing, and more particularly to measuring impurity concentrations in semiconductor substrates.
BACKGROUND OF THE INVENTION
Manufacturers of semiconductor integrated circuits are constantly striving to increase the performance and reduce the prices of their products. One way to both increase the performance and reduce the price of an integrated circuit is to reduce the size of the integrated circuit. By reducing the size of a circuit, more circuits can be manufactured on a single semiconductor substrate, thereby reducing the unit cost of the circuit. In addition, reducing the size of a circuit typically increases its speed and reduces its power consumption.
One problem manufacturers encounter in attempting to reduce the size of their integrated circuits involves impurity contamination. For example, metallic contamination of a semiconductor substrate can cause excess leakage currents, poor voltage breakdown characteristics, and reduced minority carrier lifetimes. As the size of an integrated circuit decreases, the detrimental effect of impurities in the semiconductor is magnified. For extremely small circuits, even relatively low levels of contamination can be sufficient to render the circuit inoperative. Therefore, manufacturers take extraordinary measures to prevent impurity contamination in their manufacturing processes.
To optimize their contamination control practices, manufacturers often need to measure the concentration of impurities in their semiconductor substrates at various points during the manufacturing process. This allows manufacturers to determine which area(s) of their process are causing impurity contamination problems. However, as the levels of impurity concentration have decreased to very low levels, it has become more and more difficult to measure the impurity concentration. Indeed, semiconductor industry standards such as the National Semiconductor Roadmap call for impurity concentrations to be as low as 10
10
cm
−3
in the near future. Since the atomic density of a typical semiconductor substrate such as silicon is approximately 10
22
cm
−3
, impurity concentrations of 10
10
cm
−3
can be very difficult to measure even with sophisticated measurement equipment.
For example, copper (Cu) and nickel (Ni) are two metallic impurities found in semiconductor substrates. Impurity concentrations of copper and nickel in heavily boron-doped substrates typically are measured by techniques such as Total Reflection X-Ray Fluorescence (TXRF) and Secondary Ion Mass Spectroscopy (SIMS), etc. The minimum detection limit of copper is approximately 10
17
cm
−3
by TXRF (measured near the substrate surface), and approximately 10
15
cm
−3
by SIMS. As a result, manufacturers have begun to search for new ways to measure impurity concentrations in semiconductor substrates.
SUMMARY OF THE INVENTION
The invention provides a method for evaluating the concentration of impurities in a semiconductor substrate. The method includes drawing together at least a portion of the impurities and measuring the concentration of impurities that were drawn together.
In one embodiment of the invention, a gettering layer is formed adjacent one or more surfaces of the substrate to getter impurities from the substrate to the gettering layer. The impurity concentration of the gettering layer is then measured and the results are used to determine at least a range of impurity concentrations that were in the substrate prior to the drawing together.


REFERENCES:
patent: 4053335 (1977-10-01), Hu
patent: 5233191 (1993-08-01), Noguchi et al.
patent: 5970366 (1999-10-01), Okonogi
patent: 6174740 (2001-01-01), Ohta et al.
patent: 763735 (1997-03-01), None
patent: 52069571 (1977-06-01), None
patent: 10-223713 (1998-08-01), None

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