Method for etching silicon

Details Method for etching silicon Method for etching silicon

1993-11-12

1994-11-01

Valentine, Donald R.

Chemistry: electrical and wave energy

Processes and products

Electrostatic field or electrical discharge

C25F 312

Patent

active

053605217

ABSTRACT:
A method is provided for assuring good electrical contact between a power supply and appropriate regions of silicon wafers to assure proper etching during the micromachining of the silicon die locations on the wafer. A plurality of conductors are disposed in the interstices between rows and columns of die locations and each die location that is to be etched is provided with a conductive extension connecting its relevant region with one of the interstice conductors. A preselected number of die locations are dedicated to the purpose of providing conductive pads against which contacts of a power supply can be disposed. The many interconnections between the row interstice conductors and the column interstice conductors assures good electrical distribution across the entire surface of a first side of the wafer.

REFERENCES:
patent: 3853650 (1974-12-01), Hartlaub
patent: 4664762 (1987-05-01), Hirata
patent: 4808549 (1989-02-01), Mikkor et al.
patent: 4874499 (1989-10-01), Smith et al.
patent: 4996627 (1991-02-01), Zias et al.
patent: 5167778 (1992-12-01), Kaneko et al.

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