Semiconductor device manufacturing: process – Chemical etching – Liquid phase etching
Reexamination Certificate
2000-08-10
2002-11-19
Mills, Gregory (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Liquid phase etching
Reexamination Certificate
active
06482749
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to methods for etching the edge of a wafer and, more particularly, to methods for etching the edge of a wafer using a potassium-based chemical oxidizer, such as potassium permanganate, in the presence of hydrofluoric (HF) acid.
BACKGROUND OF THE INVENTION
Wafers
10
, such as silicon wafers, that form the substrate upon which semiconductor devices are formed must be made to exact specifications and must be generally free of manufacturing defects. During a typical wafer fabrication process, wafers are sliced from an ingot. The resulting wafers have relatively rough, but square edges as depicted in FIG.
1
A. Thereafter, the wafer edge is ground to size the wafer to an exact diameter and to form the edges into a preferred geometric shape. In this regard, the edge is generally ground to define chamfered portions proximate each of the opposed major surfaces. See FIG.
1
B. This grinding process, however, can create imperfections in the wafer (depicted schematilcally as pits
12
in
FIG. 1
) which, in the ensuing machining processes, can cause problems, such as by leading to mounding or crowning of a subsequently deposited epitaxial layer, as described in detail hereinbelow.
Following grinding of the wafer edge, the wafer
10
is typically cleaned in an alkaline solution and, in many instances, is then subjected to an acid etching treatment. See
FIGS. 1C and 1D
. The alkaline cleaning will tend to preferentially etch the wafer edge and, as such, may actually enlarge the imperfections created by the grinding process. While the acid etching may somewhat decrease the roughness of the wafer edge, the acid etching typically does not completely counteract or offset the effects of the alkaline cleaning.
Typically, wafers
10
are processed to establish gettering sites on the backside of the wafer. As known to those skilled in the art, the gettering sites attract bulk impurities, such as transition metals, away from the front surface of the wafer upon which semiconductor devices are typically formed. One technique for creating gettering sites on the backside of a wafer is to sandblast or otherwise roughen the back surface of the wafer. However, another common technique for establishing gettering sites on the backside of a wafer is to deposit a polysilicon layer
14
on the wafer, typically by means of a low pressure chemical vapor deposition (LPCVD) process. The polysilicon layer is subsequently removed, such as by polishing, from the front surface of the wafer, but remains on the back surface of the wafer in order to serve as gettering sites for bulk impurities within the wafer. Unfortunately, in depositing the polysilicon layer on the wafer, the polysilicon layer is also deposited on the wafer edge and within the imperfections in the wafer edge as shown in FIG.
1
E.
As also shown in
FIG. 1E
, a silicon dioxide (SiO
2
) layer
16
is also oftentimes deposited on the back surface of the wafer
10
in order to create a back seal to prevent autodoping during subsequent processing of the wafer, thereby preventing dopants from escaping through the back surface of the wafer and being disadvantageously redeposited upon the front surface of the wafer. In particular, an SiO
2
layer is typically deposited on the back surface of those wafers that will subsequently undergo an epitaxial deposition process as described hereinafter. Typically, the SiO
2
layer is deposited by chemical vapor deposition (CVD) process. As a result, SiO
2
layer is deposited not only on the back surface of the wafer, but also upon the wafer edge as shown in FIG.
1
E. In order to remove the SiO
2
from the wafer edge, the wafer is typically cleaned and the wafer edge is then etched with HF acid. While the HF acid removes the SiO
2
, the HF acid does not remove the polysilicon layer
14
that was previously deposited upon the wafer. As such, the wafer edge is still coated with polysilicon following the HF acid etching. See FIG.
1
F.
Following the HF etching process, the wafers are then rinsed and inspected. Following inspection, the edges are subjected to chemical mechanical polishing (CMP), typically by means of an edge polishing machine, such that the resulting edge surfaces have a smooth mirror-like finish that resists the subsequent adhesion of contaminants.
See FIG.
1
G. As known to those skilled in the art, edge polishing commonly utilizes a slurry which provides the abrasive for the polishing process. Since the wafer edges are still coated with polysilicon, however, the polishing process takes a substantial length of time in order to remove the polysilicon layer
14
and expose the bare silicon. As a result, the throughput of the wafer fabrication process may be slowed somewhat by the length of time required to remove the polysilicon layer during the polishing of the wafer edge. Additionally, even once the wafer edge has been polished so as to remove the polysilicon layer, polysilicon will remain in any imperfections
12
not removed from the wafer edge. Any polysilicon that remains on the contoured edge at an acute angle from the plane of the wafer's front surface has the potential to act as an initiating site for a failure phenomena resulting from epitaxial deposition upon the site that is commonly referred to as a nodule. Effective removal of the polysilicon results in fewer initiating sites where nodules often form during subsequent epitaxial deposition as described below.
Once the wafer edge has been ground, etched, and polished, as described above, the front surface of the wafer
10
can be polished, usually by means of a polishing machine that sequentially employs slurry having particulates of decreasing sizes in order to finely polish the front surface. See FIG.
1
H. While the polishing of the front surface of the wafer can complete the wafer fabrication process, some semiconductor device manufacturers desire for an epitaxial layer to be deposited upon the front surface.
During the deposition of an epitaxial layer
18
upon the front surface of the wafer
10
, the epitaxial layer will build upon and continue the crystal orientation, or lack thereof, of the polysilicon in the form of nodules on the wafer edges. Since the polysilicon pre-nodule sites have an indeterminate crystal orientation, an epitaxial layer deposited upon this site will also have an indeterminate crystal orientation, thereby rendering that portion of the wafer unfit for the fabrication of most semiconductor devices due to the resulting irregular surface texture near the edge region on the front side of the wafer. Moreover, the edge region of the epitaxial layer will tend to mound or crown as depicted in
FIG. 1I
, thereby preventing the epitaxial layer from having a flat surface, as desired. To date, however, it has proven difficult to remove the polysilicon from the imperfections prior to growing the epitaxial layer on the front surface of the wafer.
SUMMARY OF THE INVENTION
The present invention relates to a method for fabricating a wafer that grinds the edge of the wafer to size the wafer and to shape the wafer edge and, following the deposition of a polysilicon layer on the wafer, etches the wafer edge with a potassium-based chemical oxidizer, such as potassium permanganate, in the presence of HF acid in order to remove polysilicon from and otherwise reduce the roughness of the wafer edge. The edge of the wafer is then polished in a more efficient manner and for a shorter length of time than conventional edge polishing techniques since the polysilicon layer has already been removed and the corresponding roughness of the wafer edge has been reduced in advance of the edge polishing.
The edge of the wafer is typically etched with a potassium-based chemical oxidizer in the presence of HF acid at a removal rate of between 1.5 microns/minute and 4 microns/minute. For these removal rates, the etchant typically has a ratio of HF acid to potassium-based chemical oxidizer of between 2:1 and 4:1. Not only does the potassium-based chemical oxidizer in the presence of HF aci
Billington Mitchell Stephen
Harrison Wesley T.
Huang Yao Huei
Alston & Bird LLP
Anderson Matthew
Mills Gregory
SEH America Inc.
LandOfFree
Method for etching a wafer edge using a potassium-based... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for etching a wafer edge using a potassium-based..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for etching a wafer edge using a potassium-based... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2957474