Method for etching a dielectric layer over a semiconductor...

Etching a substrate: processes – Nongaseous phase etching of substrate – Substrate is multilayered

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C216S099000, C438S756000

Reexamination Certificate

active

06187216

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates, in general, to etching a semiconductor material and, more particularly, to wet etching a dielectric material on a semiconductor wafer.
Wet etching is widely used in semiconductor wafer processing for removing material from a semiconductor wafer. An example of a wet etch that is used extensively throughout the semiconductor industry is a Buffered Oxide Etch (BOE). BOE is used to etch a dielectric material such as phosphorus doped silicate glass (PSG). PSG is commonly used as a sacrificial layer to protect areas of a semiconductor wafer when forming semiconductor devices or micromachining sensor structures. PSG is also used to electrically isolate conductive regions over a semiconductor wafer from one another.
A typical wet etch process begins with a semiconductor wafer being dipped into a surfactant. The semiconductor wafer is then submerged into a recirculating bath of the etchant to etch a dielectric material. After etching, the semiconductor wafer is rinsed in deionized water and then dried in an isopropyl alcohol vapor. In some applications, e.g., in micromachining sensor applications, the semiconductor wafer is submerged in a hydrogen peroxide solution after it has been rinsed in the deionized water. Then, a second deionized water rinse is performed and the semiconductor wafer is dried in the isopropyl alcohol vapor. In general, the process of wet etching in the semiconductor industry has not significantly changed for many years.
Accordingly, it would be advantageous to have a process for etching a dielectric material over a semiconductor wafer which is highly selective and controllable. It would be of further advantage for the etching process to be simple and easily integrated into an existing etching process.


REFERENCES:
patent: 5593538 (1997-01-01), Davison et al.
“Tough Under Pressure! Liqui-Cel”, AT&T Application Sheet, PC-P41-1/97-HC, 1997 Hoechst Celanese Corporation.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for etching a dielectric layer over a semiconductor... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for etching a dielectric layer over a semiconductor..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for etching a dielectric layer over a semiconductor... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2576493

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.