Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2006-06-27
2006-06-27
Everhart, Caridad (Department: 2891)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S738000, C257SE21032, C257SE21218, C257SE21219
Reexamination Certificate
active
07067435
ABSTRACT:
The present invention provides a method for etching a substrate100. The method includes conducting a first etch through a dielectric layer130located over an etch-stop layer140, the dielectric layer having a photoresist layer170located thereover and the first etch being selective to the etch-stop layer140. A second etch different from the first etch is conducted on the etch-stop layer120, the second etch including nitrogen and at least one fluorocarbon gas, such that the ratio of nitrogen to carbon in the etchant is greater than about 5:1.
REFERENCES:
patent: 6337277 (2002-01-01), Chou et al.
patent: 6372631 (2002-04-01), Wang et al.
patent: 6605540 (2003-08-01), Ali et al.
patent: 6809028 (2004-10-01), Chen et al.
patent: 6828251 (2004-12-01), Su et al.
patent: 2003/0008512 (2003-01-01), Ali et al.
patent: 2003/0020176 (2003-01-01), Nambu
patent: 2003/0024902 (2003-02-01), Li et al.
patent: 2003/0129825 (2003-07-01), Yoon
patent: 2003/0181034 (2003-09-01), Jiang et al.
patent: 2004/0087133 (2004-05-01), Kumar
patent: 2004/0192058 (2004-09-01), Chu et al.
patent: 2005/0104150 (2005-05-01), Wetzel et al.
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