Method for error correction in memory system

Details Method for error correction in memory system Method for error correction in memory system

1987-04-23

1989-08-15

Fleming, Michael R.

Excavating

371 39, G06F 1110

Patent

active

048582360

ABSTRACT:
An error detection and correction method in an error detection and correction system using an error check code is disclosed, which decides whether a bit error exists in the data portion or in the check code portion in a read out data, and if the bit error exists in the check code portion, it outputs the data portion as it is and if a correctable bit error exists in the data portion, it outputs after correction and recheck, thereby increasing efficiency and reliability of memory system.

REFERENCES:
patent: 4561095 (1985-12-01), Khan
patent: 4646301 (1987-02-01), Okamoto
patent: 4672614 (1987-06-01), Yoshida
patent: 4689792 (1987-08-01), Traynor
patent: 4694454 (1987-09-01), Matsuura
patent: 4706249 (1987-11-01), Nakagawa
patent: 4712216 (1987-12-01), Glaise

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