Method for erasing flash memories and related system thereof

Details Method for erasing flash memories and related system thereof Method for erasing flash memories and related system thereof

2007-12-25

2007-12-25

Auduong, Gene N. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185230, C365S185270

Reexamination Certificate

active

11278964

ABSTRACT:
A method for erasing data of a flash memory is disclosed. The flash memory includes a plurality of memory cells coupled to a word line, where each of the memory cells has a substrate, an isolated carrier storage layer, and a control gate coupled to the word line. And the method includes: coupling the substrate to a first voltage to increase a voltage level of the substrate; before erasing data, floating the control gate to make a voltage level of the control gate increase with the voltage level of the substrate; and coupling the control gate to a second voltage via the word line to discharge charges on the isolated carrier storage layer for erasing data.

REFERENCES:
patent: 5747849 (1998-05-01), Kuroda et al.
patent: 5828600 (1998-10-01), Kato et al.

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