Method for erasing and programming memory devices

Details Method for erasing and programming memory devices Method for erasing and programming memory devices

1998-10-13

2000-01-04

Nelms, David

Static information storage and retrieval

Floating gate

Particular biasing

36518526, 36518518, G11C 1604

Patent

active

060117222

ABSTRACT:
A method for programming and/or erasing an array of stacked gate memory devices such as EPROM and EEPROM devices in a NOR array is disclosed. In the method, either a program verify or an erase verify is performed intermittently with the programming of a device or the erasure of the array. During the program-verify, one of either a negative V.sub.CS is applied to the deselected devices in the array, a negative V.sub.BS is applied to both the selected and deselected devices in the array, or both conditions are applied. Performing the program verify or erase verify in this manner is efficient and accurate. During the programming step, it is also advantageous if one of either a negative V.sub.CS is applied to the deselected devices in the array, a negative V.sub.BS is applied to the selected devices in the array, or both. With the application of a negative V.sub.CS to the deselected devices during programming, if there are any over-erased devices in the array, the presence of the over-erased devices will not adversely affect the programming of the devices.

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