Method for equalization of the pulse widths of a digital signal

Details Method for equalization of the pulse widths of a digital signal Method for equalization of the pulse widths of a digital signal

1988-09-28

1992-05-05

Olms, Douglas W.

Pulse or digital communications

Repeaters

Testing

375 99, 375102, 307265, 328165, 328112, H04L 2552, H04L 2508, H03K 1100

Patent

active

051114801

ABSTRACT:
A method and apparatus for equalizing pulse widths of a digital signal. In digital communications transmission systems, the transmitted digital signals are regenerated using line equalizers. Since higher requirements exist for the equalization with digital clock recovery equipment, it is necessary to again equalize the pulse widths. The beginning of the pulses of the equalized digital signal (D3) is obtained from the leading edges of the pulses of the digital signal (D2) which is to be equalized and the end of the pulses of the equalized digital signal (D3) is obtained from the leading edges of the pulses of an auxiliary data clock (DHT). The equipment can be an integrated circuit which has two D-flipflops (22, 23) that alternately process the pulses under the control of a JK-flipflop (26). Digital signals (D2) having a bit rate equal to or greater than 34Mbit/s can also be processed.

REFERENCES:
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patent: 4070631 (1978-01-01), Nash et al.
patent: 4179625 (1979-12-01), Carter
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patent: 4472814 (1984-09-01), Gutleber
patent: 4554445 (1985-11-01), Chasse et al.
patent: 4598412 (1986-07-01), Yoshida
patent: 4757214 (1988-07-01), Kobayashi
patent: 4841548 (1989-06-01), Volejnik
Japanese Abstract 56-32824-54-108363, vol. 5, No. 86 (E-60), (758) Jun. 5, 1981.

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