Pulse or digital communications – Receivers – Particular pulse demodulator or detector
Reexamination Certificate
2001-03-05
2004-11-23
Corrielus, Jean B. (Department: 2637)
Pulse or digital communications
Receivers
Particular pulse demodulator or detector
C375S262000, C714S795000, C714S796000, C714S794000
Reexamination Certificate
active
06823027
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
The present invention relates in general to the digital signal processing field and, in particular, to a method for enhancing soft-value information for a Reduced-State Sequence Estimation (RSSE) type algorithm.
2. Description of Related Art
Maximum Likelihood Sequence Estimation (MLSE) is a known method used in digital receivers to estimate what symbols have been transmitted. However, most MLSE methods are relatively complex to implement. Consequently, RSSE algorithms have been developed which significantly reduce this complexity. As such, RSSE algorithms are now commonly used for receiver estimation and equalization in the digital communications field.
The well-known Viterbi algorithm was originally developed for decoding convolutional codes. The Viterbi algorithm steps through a trellis structure and determines the most probable path (in the Maximum Likelihood sense) through the structure. The most probable path is the one that has the smallest Euclidian distance between reference symbols and received symbols. As such, Viterbi algorithms are commonly used in receiver equalizers to identify the most probable symbols received. Nevertheless, a significant problem with the Viterbi algorithm is that its complexity is often too great for practical implementation, because the algorithm has to step through an entire received signal sequence before any decision can be made. Consequently, as mentioned above, RSSE algorithms were developed in order to reduce the complexity of the Viterbi-type searches being performed.
The nomenclature “Reduced-State Sequence Estimation” is derived from a particular technical approach whereby the trellises associated with a Viterbi search algorithm are constructed with a reduced number of states. Essentially, two methods can be used for reducing the number of states in a Viterbi algorithm: (1) The RSSE method can be used to reduce the number of trellis states for a given search depth in a Viterbi algorithm; and (2) The Decision Feedback Sequence Estimation (DFSE) method (a variant of the RSSE method) can be used to reduce the number of trellis states by reducing the search depth in the Viterbi algorithm.
The Global System for Mobile Communications (GSM) and the Enhanced Data Rates for Global Evolution (EDGE) system are examples of communication systems that can use concatenated coding and decoding for modulation and demodulation. The primary technical goal of the EDGE system, which is currently still under development, is to increase the bit rate of the existing GSM system from 9.6/14.4 kbps up to a maximum of 384 kbps. One way this bit rate increase can be accomplished is to change the modulation technique from Gaussian Minimum Shift Keying (GMSK) to Octary Phase Shift Keying (8PSK). However, a significant problem with changing the modulation technique from GMSK to 8PSK is that the probability of erroneous decisions in the receiver is increased. As far as an equalizer is concerned, the resulting increase in Inter-Symbol Interference (ISI) from the 8PSK modulation, as well as the resulting increase in noise, and also less signal space per symbol, leads to a higher probability that an erroneous receive decision will occur.
The primary task of an equalizer in a digital communication system is to remove the ISI introduced by the channel. The channel's characteristics directly influence the transmitted symbols and can introduce both ISI and noise. The equalizer attempts to estimate the transmitted symbol sequence so that the receiver's demodulator can perform an inverse symbol mapping procedure to obtain the originally transmitted bit sequence.
An equalizer in a GSM or EDGE system can output both hard bits and soft-values to a channel decoder. A soft-value is a measure of the probability that a symbol estimated on the receiver side matches the transmitted symbol. Typically, an equalizer's decisions are made on a symbol-by-symbol basis. However, soft-values represent the probability of a symbol match on a bit-level basis. Furthermore, a channel decoder can use soft-values to correct possibly erroneous symbol decisions made by the equalizer. As such, a channel decoder can use both hard bit and soft-value information to perform the channel decoding.
State-of-the-art RSSE algorithms divide the trellis states of a Viterbi algorithm into a plurality of hyper-states. However, only one symbol from each hyper-state is stored. Given the same number of states, the performance of an RSSE algorithm is usually significantly higher than that of a DFSE algorithm as far as hard bit decisions are concerned. However, a significant problem with the performance of RSSE algorithms (as compared to that of DFSE algorithms) is that the RSSE algorithm's performance is significantly lower for concatenated systems that include soft-values (e.g., GSM and EDGE systems).
In other words, a problem with the state-of-the-art RSSE algorithms is that the soft-values are calculated from information related to the trellis states involved. As such, for trellises used in RSSE algorithms, some states may be missing. Consequently, in a concatenated system using an RSSE algorithm, soft-values can be calculated, but they may be calculated from less than usual information. Therefore, a significant problem with soft-value information derived by the existing RSSE algorithms is that the soft-value information is inherently less accurate in concatenated systems. Nevertheless, as described in detail below, the present invention successfully resolves the above-described problems and other related problems.
SUMMARY OF THE INVENTION
In accordance with a preferred embodiment of the present invention, an RSSE method is provided, whereby states in a trellis structure associated, for example, with a Viterbi algorithm are partitioned into a plurality of hyper-states. During a hyper-state decision interval, a hyper-soft value is calculated. The calculated hyper-soft value is a measurement of the accuracy of the hyper-state decision made. The calculated hyper-soft value can be used by an equalizer to generate soft-value information for decoding. A soft-value generated with such a hyper-soft value combined with bit soft-value in an RSSE algorithm is significantly more accurate than a soft-value that can be generated by a DFSE algorithm (i.e., without such a hyper-soft value).
An important technical advantage of the present invention is that a method is provided for generating more accurate soft-values for an RSSE algorithm.
Another important technical advantage of the present invention is that a method is provided for generating soft-values in an RSSE algorithm, whereby the performance of such an RSSE algorithm is significantly higher than that of a DFSE algorithm.
Yet another important technical advantage of the present invention is that soft-values can be generated that significantly increase the performance of a DFSE algorithm.
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Malmberg Magnus
Månsson Philip
Persson Roger
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