Patent
1996-10-29
1998-07-21
Decady, Albert
G06F 1100
Patent
active
057845506
ABSTRACT:
During generation of a test case, in response to a predictable interrupt condition a dynamic portion of a dynamic trap handler is created. The static portion of the dynamic trap handler is generic trap handler code that is not dynamically created and performs such routine tasks as loading the trap number of the interrupt condition, loading a trap code pointer and preparing the processor to branch to the location pointed to by the trap code pointer. The dynamic portion of the trap handler, however, is dynamically created in response to each interrupt condition which occurs. The unique series of instructions of the dynamic portion of the trap handler may be tailored as desired to perform any number of tasks, including verifying the trap handler, verifying trap parameters, generating code to return to a new location upon completion of the trap handler, fixing the interrupt condition, updating the trap vector table, and updating the trap code pointer and a trap data pointer. Any number of other tasks may also be added to the dynamic portion of the trap handler.
REFERENCES:
patent: 4074353 (1978-02-01), Woods et al.
patent: 5146460 (1992-09-01), Ackerman et al.
Brockmann Russell C.
Brummel Karl
De'cady Albert
Hewlett--Packard Company
LandOfFree
Method for enhanced functional testing of a processor using dyna does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for enhanced functional testing of a processor using dyna, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for enhanced functional testing of a processor using dyna will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1656129