Method for encapsulating a semiconductor package having aperture

Details Method for encapsulating a semiconductor package having aperture Method for encapsulating a semiconductor package having aperture

1998-05-27

2000-07-25

Chaudhuri, Olik

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Encapsulating

438108, 438110, 438119, 438124, 438126, H01L 2144

Patent

active

060935847

ABSTRACT:
A method of manufacturing a semiconductor chip package. A sacrificial layer is used as a base to selectively form an array of conductive pads such that a central region is defined by the pads. A back surface of a semiconductor chip is next attached to the sacrificial layer within the central region between the pads so that the contact bearing surface of the chip faces away from the sacrificial layer. The chip contacts are then electrically connected to respective pads, typically by wire bonding a wire therebetween. A curable, dielectric liquid encapsulant is then deposited on the sacrificial layer such that the pads, electrical connections and chip are fully encapsulated, as by an overmolding operation. The encapsulant is then cured and the sacrificial layer is either completely removed or is selectively removed to expose a surface of the pads for electrical attachment to a PWB and the back surface of the chip for creating a direct thermal path from the chip to the PWB.

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patent: 5557150 (1996-09-01), Veroit et al.
patent: 6001671 (1999-12-01), Fjelstad

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