Method for electrochemical oxidation

Details Method for electrochemical oxidation Method for electrochemical oxidation

2004-01-08

2004-11-09

Ghyka, Alexander (Department: 2812)

Semiconductor device manufacturing: process

Direct application of electrical current

C438S010000, C438S770000

Reexamination Certificate

active

06815315

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a method for the electrochemical oxidation of semiconductors.
BACKGROUND ART
There has heretofore been known a wet anodization method as one of techniques for providing porosity to a semiconductor or for forming an oxide film on the surface of a semiconductor. The techniques for forming an oxide film on the surface of a semiconductor also include an electrochemical oxidation method utilizing an electrochemical reaction. In late years, there has been proposed a field emission-type electron source prepared by a process using a wet anodization method and an electrochemical oxidation method.
For example, as shown in
FIG. 20
, this kind of field emission-type electron source
10
(hereinafter referred to as “electron source 10” for brevity) comprises an n-type silicon substrate
1
as a conductive substrate, and a strong-field drift layer
6
(hereinafter referred to as “drift layer 6” for brevity) which is composed of an oxidized porous polycrystalline silicon layer and formed on the side of one of the principal surfaces of the n-type silicon substrate
1
. Further, a surface electrode
7
composed of a metal thin film (e.g. gold thin film) is formed on the drift layer
6
, and an ohmic electrode
2
is formed on the back surface of the n-type silicon substrate
1
. In this structure, the n-type silicon substrate
1
and the ohmic electrode
2
serve as a lower electrode
12
. While the electron source
10
illustrated in
FIG. 20
includes a non-doped polycrystalline silicon layer
3
interposed between the n-type silicon substrate
1
and the drift layer
6
, there has also been proposed another electron source designed such that the drift layer
6
is formed directly on the principal surface of the n-type silicon substrate
1
.
In an operation of emitting electrons from the electron source
10
illustrated in
FIG. 20
, a collector electrode
21
is disposed in opposed relation to the surface electrode
7
. Then, after a vacuum is formed in the space between the surface electrode
7
and the collector electrode
21
, a DC voltage Vps is applied between the surface electrode
7
and the lower electrode
12
in such a manner that the surface electrode
7
has a higher potential than that of the lower electrode
12
. Simultaneously, a DC voltage Vc is applied between the collector electrode
21
and the surface electrode
7
in such a manner that the collector electrode
21
has a higher potential than that of the surface electrode
7
. Each of the DC voltages Vps, Vc can be appropriately arranged to allow electrons injected from the lower electrode
12
into the drift layer
6
to be emitted through the surface electrode
7
after drifting in the drift layer
6
(the one-dot chain lines in
FIG. 20
indicate the flow of the electrons e
−
emitted through the surface electrode
7
.). The surface electrode
7
is made of a metal material having a small work function.
While the electron source
10
illustrated in
FIG. 20
has the lower electrode
12
composed of the n-type silicon substrate
1
and the ohmic electrode
2
, there has also been proposed another electron source
10
as shown in
FIG. 21
, in which a lower electrode
12
made of a metal material is formed on one of the principal surfaces of an insulative substrate
11
. The electron source
10
illustrated in
FIG. 21
emits electrons in the same process as that of the electron source
10
illustrated in FIG.
20
.
Generally, in this kind of electron source
10
, a current flowing between the surface electrode
7
and the lower electrode
12
is referred to as “diode current Ips”, and a current flowing between the collector electrode
21
and the surface electrode
7
is referred to as “emission current (emitted electron current) Ie”. In the electron sources
10
, an electrode emission efficiency (=(Ie/Ips)×100[%]) becomes higher as the ratio (Ie/Ips) of the emission current Ie to the diode current Ie is increased. In this connection, the emission current Ie becomes higher as the DC voltage Vps is increased. This electron source
10
exhibits electron emission characteristics having a low dependence on the degree of vacuum, and can stably emit electrons at a high electron emission efficiency without occurrence of a so-called popping phenomenon.
If the electron source
10
illustrated in
FIG. 21
is applied as an electron source of a display, the display may be configured as shown in FIG.
22
. The display illustrated in
FIG. 22
comprises an electron source
10
, and a faceplate
30
which is composed of a flat-plate-shaped glass substrate and disposed in opposed relation to the electron source
10
. A collector electrode (hereinafter referred to as “anode electrode”)
21
composed of a transparent conductive film (e.g. ITO film) is formed on the surface of the faceplate
30
opposed to the electron source
10
. The surface of the anode electrode
21
opposed to the electron source
10
is provided with fluorescent materials formed in each of pixels, and black stripes made of a black material and formed between the fluorescent materials. Each of the fluorescent materials applied on the surface of the anode electrode
21
opposed to the electron source
10
can generate a visible light in response to electron beams emitted from the electron source
10
. The electrons emitted from the electron source
10
are accelerated by a voltage applied to the anode electrode
21
, and the highly energized electrons come into collision with the fluorescent materials. Three type of fluorescent materials having luminescent colors of R (red), G (green) and B (blue) are used as the fluorescent materials. The faceplate
30
is spaced apart from the electron source
10
by a rectangular frame (not shown), and an sealed space formed between the faceplate
30
and the electron source
10
is kept in vacuum.
The electron source
10
illustrated in
FIG. 22
comprises an insulative substrate
11
composed of a glass substrate, a plurality of lower electrodes
12
arranged in lines on the surface of the insulative substrate
11
, a plurality of polycrystalline silicon layers
3
each of which is formed on the corresponding lower electrode
12
in a superimposed manner, a plurality of drift layers
6
each of which is composed of an oxidized porous polycrystalline silicon layer and formed on the corresponding polycrystalline silicon layer
3
in a superimposed manner, a plurality of isolation layers
16
each of which is composed of a polycrystalline silicon layer and embedded between the adjacent drift layers
6
, and a plurality of surface electrodes
7
which are formed on the drift layers
6
and the isolation layers
16
, and arranged in lines to extend in the crosswise direction of the lower electrodes
12
so as to cut across the drift layers
6
and the isolation layers
16
.
In the electron source
10
, the drift layers
6
are partly sandwiched between the corresponding lower electrodes
12
arranged on the surface of the insulative substrate
11
and the corresponding surface electrodes
7
arranged in the crosswise direction of the lower electrodes
12
, at the regions of the drift layers
6
corresponding to the intersecting points between the corresponding lower electrodes
12
and the corresponding surface electrodes
7
. Thus, a certain voltage can be applied between appropriately selected one of the plural pairs of the surface electrode
7
and the lower electrode
12
, to allow a strong electric field to act on the region of the drift layer
6
corresponding to the intersecting point between the selected surface electrode
7
and lower electrode
12
so as to emit electrons from the region. This configuration is equivalent to an electron source in which a plurality of electron source elements
10
a
, each of which comprises the lower electrode
12
, the polycrystalline silicon layer
3
on the lower electrode
12
, the drift layer
6
on the polycrystalline layer
3
, and the surface electrode
7
on the drift layer
6
, are arranged, respectivel

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