Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2007-09-11
2007-09-11
Hjerpe, Richard (Department: 2629)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S089000, C345S094000
Reexamination Certificate
active
10701856
ABSTRACT:
A drive circuit of a display that decreases the number of gates in a selection circuit to reduce chip area. The drive circuit includes a first voltage dividing circuit for generating a plurality of divisional voltages by dividing a predetermined reference voltage. A selection circuit receives a selection signal and selects one of the divisional voltages. The selection circuit includes a plurality of first switch circuits selectively activated in response to the selection signal to select one of the divisional voltages. Each of the first switch circuits is provided with a logic switch function and has an ON resistance when activated. An activated one of the first switch circuits generates the pixel voltage by further dividing the selected one of the divisional voltages.
REFERENCES:
patent: 2002/0008686 (2002-01-01), Kumada et al.
patent: 2003/0034947 (2003-02-01), Tanaka et al.
patent: 2005/0225573 (2005-10-01), Kudo et al.
patent: 9-138670 (1997-05-01), None
patent: 9-258695 (1997-10-01), None
Fukuda Hideto
Kudo Osamu
Kumagai Masao
Udo Shinya
Fujitsu Limited
Greer Burns & Crain Ltd.
Hjerpe Richard
Said Mansour M.
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