Method for driving an alternating current plasma display...

Electric lamp and discharge devices: systems – Plural power supplies – Plural cathode and/or anode load device

Reexamination Certificate

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Details

C345S204000

Reexamination Certificate

active

06677714

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates in general to a method for driving a plasma display panel (PDP) and circuit therefor, and in particular, to a method for driving an alternating current plasma display panel (AC PDP) during the reset period and circuit therefor.
2. Description of the Related Art
As the fabrication technology of the audio/video (A/V) devices is developing rapidly, higher quality audio and video services are foreseen popular among the users. Take the display device for example. The conventional cathode ray tube (CRT) display cannot provide better audio and video quality than movies, as well as having the disadvantages of large volume, serious radiation issue, and serious image contortion and distortion at the brim region of the screen. The conventional CRT display device certainly cannot satisfy the demands for higher quality audio and video services. Thus, the high definition digital television (HDTV) system has been developing to meet these demands for higher audio and video quality comparable to that of a movie. When the HDTV begins to broadcast and the compliant products become more affordable, the CRT displays will be phased out. In addition, the plasma display panel (PDP) display, with the advantages of low radiation, low power consumption, and large display area with small volume, is a very-promising HDTV display to replace the CRT display.
FIG. 1
shows a cross-sectional view of one pixel unit
100
of a tri-electrode alternating current plasma display panel (AC PDP). The ACPDP includes a front glass plate
102
, a dielectric layer
104
, a protective layer
106
, a rear glass plate
108
, a fluorescence layer
110
, and a dielectric layer
116
. Each pixel unit includes a sustain electrode X, a scan electrode Y, and a data electrode A. The front glass plate
102
has a plurality of sustain electrodes X and scan electrodes Y which are arranged alternately and in parallel on the front glass plate
102
. The dielectric layer
104
, covering the sustain electrodes X and scan electrodes Y, is used for accumulating wall charges, and is covered by the protective layer
106
formed by magnesium oxide (MgO). The protective layer
106
is used for protecting the X electrodes, the Y electrodes, and the dielectric layer
104
. The data electrode A is formed on the back glass plate
108
opposite to the front glass plate
102
, and is orthogonal to the X electrode and the Y electrode respectively. The data electrode A is covered by the dielectric layer
116
. The fluorescence layer
110
is formed on the dielectric layer
116
and the sidewalls of the spacer. The space between the protective layer
106
and the fluorescence layer
110
is called a discharge space
114
and is filled with the discharge gas mixed with Ne and Xe.
The PDP includes a plurality of pixel units
100
, disposed in the form of a rectangle matrix. It further includes a driving circuit for driving these pixel units
100
according to a regular driving sequence. Each pixel unit
100
can be regarded as a capacitive load and the driving circuit provides the alternating current of high frequency for charging each pixel unit
100
through the corresponding sustain electrode X and scan electrode Y The gas in the discharge space
114
are excited, discharged, and then emit UV light. The fluorescence layer
110
absorbs the UV light of specified wavelengths and then emits visible lights.
FIG. 2
illustrates the timing chart of a conventional driving circuit. The driving sequence includes a reset period T
1
, an address period T
2
, and a sustain period T
3
respectively. In the reset period T
1
, each pixel unit is reset by respectively applying erase pulses to the corresponding sustain electrode X and the scan electrode Y so that the accumulation of the wall charges for each pixel unit is set to the same. In the address period T
2
, the image data signals are applied to the pixel units selected to emit lights. In the sustain period T
3
, light pulses are produced by applying alternating voltages across the sustain electrode X and the scan electrode Y of the selected pixel units by the help of the memory effect of the wall charges.
As shown in
FIG. 2
, the reset period T
1
includes three periods: a first reset period T
11
, a second reset period T
12
, and a third reset period T
13
. During the first reset period T
11
, a first erase pulse P
Y1
of about 100 &mgr;s duration is applied to all the scan electrodes Y to remove the wall charges remaining after the last sustain period. During the second reset period T
12
, a priming pulse P
X2
, being a square pulse of high level voltage and positive polarity, is applied to all the sustain electrodes X to produce wall charges of the pixel units again. Since the use of the priming pulse P
X2
results in an instant high voltage across the sustain electrode X and scan electrodes Y, the discharge gas in the discharging space
114
is excited, producing the wall charges in each pixel unit. During the third reset period T
13
, a second erase pulse P
Y3
of about 100 &mgr;s duration is applied to the all scan electrodes Y to remove the redundant wall charges in each pixel unit.
However, the manufacturing cost is high because a complex circuit is needed to provide an instant high voltage during the second reset period T
12
. Besides, the fierce discharging in the second reset period T
12
will lower the brightness contrast of the PDP owing to the increasing in background brightness Therefore, it is desirable to provide a low cost and high brightness-contrast PDP.
SUMMARY OF THE INVENTION
It is therefore an object of the invention to provide a method of driving an AC PDP during a reset period to cause the distribution of the wall charges in the pixel units to be less different. Improved brightness contrast of the ACPDP is achieved since the background brightness is reduced during the reset period. In addition, a simplified driving circuit can be used to drive the ACPDP, thus resulting in reduced manufacturing cost.
The AC PDP has a plurality of pixel units, and each pixel units has a first electrode, a second electrode and a third electrode. The first electrode and the second electrode are parallel to each other, and the third electrode is perpendicular to the first electrode. Firstly, a first erase pulse is applied to the first electrode so as to remove the wall charges from the pixel units, wherein the first erase pulse is positive in polarity and increases slowly with time. Then, a first priming pulse and a second priming pulse are respectively applied to the first electrode and the second electrode so as to produce the wall charges on the plurality of pixel units, wherein the first priming pulse is negative in polarity and slowly increases in magnitude with time, and the second priming pulse is positive in polarity and slowly increases in magnitude with time. Finally, a second erase pulse is applied to the first electrode so as to remove the redundant wall charges, wherein the second erase pulse is positive in polarity and slowly increases in magnitude with time.


REFERENCES:
patent: 6198476 (2001-03-01), Hong et al.

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