Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1998-03-30
2001-12-18
Saras, Steven (Department: 2675)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S041000, C345S064000
Reexamination Certificate
active
06331842
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method for driving a plasma display panel (PDP) of a surface discharge type.
Recently, as a display device becomes large in size, thickness of the display device is desired to be thin. Therefore, various types of display devices of thin thickness are provided. As one of the display devices, an ACPDP is known.
A conventional ACPDP comprises a plurality of data electrodes (address electrodes) and a plurality of row electrodes (sustain electrodes) formed in pairs and disposed to intersect the data electrodes. A pair of row electrodes form one row (one scanning line) of an image. The data electrodes and the row electrodes are covered by dielectric layers respectively, at a discharge space. At the intersection of each of the data electrodes and each pair of row electrodes, a discharge cell (pixel) is formed. Each of the row electrodes comprises a transparent electrode and a bus electrode layered on the transparent electrode.
FIG. 6
shows a timing chart of drive signals for driving the ACPDP.
A reset pulse RPx of negative voltage is applied to each of the row electrodes X
1
-Xn, and a reset pulse RPy of positive voltage is applied to each of the row electrodes Y
1
-Yn. Thus, the row electrodes in pairs are excited to discharge at all of the discharge cells, thereby producing charged particles in the discharge space. Thereafter, when the discharge is finished, wall charge is formed and accumulated on the discharge cell (A reset all at once period).
Then, pixel data pulses DP
1
-DPn corresponding to the pixel data for every row are applied to the pixel data electrodes D
1
-Dm in order. At that time, scanning pulses (selecting and erasing pulses) SP are applied to the row electrodes Y
1
-Yn in order in synchronism with the timings of the data pulse DP
1
-DPn.
At the time, only in the discharge cell (unlighted pixel, unlighted cell) to which the scanning pulse SP and the pixel data pulse DP are simultaneously applied, the discharge occurs, so that the wall charge produced at the reset all at once period is erased.
On the other hand, in the discharge cell (lighted pixel, lighted cell) to which only the scanning pulse SP is applied, the discharge does not occur. Thus, the wall charge produced at the reset all at once period is held. Namely, the wall charge is selectively erased in accordance with the pixel data, thereby selecting a lighted pixel and an unlighted pixel (An address period).
A discharge sustaining pulse IPx of positive voltage is applied to the row electrodes X
1
-Xn, and a discharge sustaining pulse IPy of positive voltage is applied to each of the row electrodes Y
1
-Yn at offset timing from the sustaining pulses IPx.
During the sustaining pulses are applied, the discharge cell (lighted pixel, lighted cell) which holds the wall charge sustains the discharge and emission of light. On the other hand, the discharge cell (unlighted pixel, unlighted cell) in which the wall charge is disappeared does not produce the discharge and emit the light (A discharge sustaining period).
Then, wall charge erasing pulses EP are applied to the row electrodes Y
1
-Yn all at once, thereby erasing the wall charges on all of the discharge cells (lighted cells) (A wall charge erasing period).
From the foregoing, in the PDP, the reset all at once period, address period, discharge sustaining period and wall charge erasing period are repeated as one display cycle, thereby displaying the image.
In such a method, during the discharge sustaining period, an unlighted cell may start discharging influenced by an adjacent lighted cell. The reason will be supposed as described hereinafter with reference to
FIGS. 7
a
to
7
d
. In
FIGS. 7
a
to
7
d
, the row electrodes X and Y are disposed in pair so as to be alternately changed in the position such as X-Y and Y-X. The row electrodes X and Y consist of a lighted cell, and the row electrodes Y and X consist of an unlighted cell. Each of the row electrodes Y has a positive polarity.
Normally, during the address period, in the unlighted cell, minus charges are accumulated on the data electrode D, and plus charges are accumulated on the row electrodes X and Y by selecting and erasing discharge. However, in a sub-field, if the erasing discharge is insufficient in the wall charge erasing period after the discharge sustaining period, and hence the wall charges remain on the row electrodes X and Y at portions opposite to the discharge gap G, the wall charge by selecting and erasing discharge is added to the residual wall charges. The wall charges are accumulated on the residual wall charges.
Therefore, as shown in
FIG. 7
a
, in the unlighted cell, during the discharge sustaining period, immediately before the sustaining pulse by which the error discharge may occur is applied, an electric field E of the row electrode Y of the positive polarity toward the data electrode D becomes strong.
If the distance between adjacent display lines (distance between the adjacent row electrodes Y) is small, influence of the priming particles of the lighted cell on the unlighted cell becomes large.
Then, as shown in
FIG. 7
b
, when the next discharge sustaining pulse is applied to the row electrode Y, the discharge of the lighted cell is transferred to the adjacent unlighted cell. Therefore, unnecessary discharge produces between the data electrode d and the row electrode Y of the unlighted cell.
As shown in
FIG. 7
c
, because of the unnecessary discharge, the positive polarity of the wall charges on the row electrode Y is converted into the negative polarity. Thus, a difference of potential produces between the row electrodes X and Y of the unlighted cell.
As shown in
FIG. 7
d
, when a further discharge sustaining pulse is applied, the error discharge produces on the unlighted cell.
The influence of the discharge for the error discharge further increases because of defect in portions for dividing the discharge cell or deflection of a pair of substrates, thereby deteriorating a manufacturing yield of the PDP. Furthermore, in order to obtain the PDP of high definition by reducing the size of discharge cell or the pitch of the scanning line, the distance between the adjacent discharge cells is reduced. Therefore, the error discharge is liable to occur.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a driving method for a plasma display panel of a surface discharge type in which the above mentioned problems are solved, thereby preventing an error discharge in a discharge sustaining period, and hence improving the display characteristic.
According to the present invention, there is provided a method for driving a plasma display panel having a plurality of first and second sustain electrodes, a plurality of address electrodes which intersect with the sustain electrodes to form a pixel at every intersection, an address period in which data pulses are applied to the address electrodes, and scanning pulses are applied to the second sustain electrodes, thereby selecting lighted pixels and unlighted pixels, and a discharge sustaining period in which discharge sustaining pulses are alternately applied to the first and second sustain electrodes so as to sustain the lighted and unlighted pixels, comprising applying an offset voltage having the same polarity as the data pulse to the address electrodes in the discharge sustaining period.
The method further comprises a reset period before the address period in which a plurality of reset pulses are applied to all of the electrodes so as to form a wall charge in each of the pixels, the data pulses and scanning pulses are selectively applied to the electrodes, thereby selectively erasing the wall charges so as to select the lighted pixels and unlighted pixels.
These and other objects and features of the present invention will become more apparent from the following detailed description with reference to the accompanying drawings.
REFERENCES:
patent: 4772884 (1988-09-01), Weber et al.
patent: 5420602 (1995-05-01), Kanazawa
patent: 5436634 (1995-07-01), Ka
Amemiya Kimio
Nozu Mitsunori
Tokunaga Tsutomu
Arent Fox Kintner & Plotkin & Kahn, PLLC
Kumar Srilakshmi
Poineer Electric Corporation
Saras Steven
LandOfFree
Method for driving a plasma display panel does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for driving a plasma display panel, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for driving a plasma display panel will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2559896