Metal working – Method of mechanical manufacture – Assembling or joining
Patent
1984-12-10
1986-05-27
Roy, Upendra
Metal working
Method of mechanical manufacture
Assembling or joining
29576B, 29577C, 148 15, 148187, 148DIG82, 357 235, 357 42, 357 91, H01L 2978, G11C 1140
Patent
active
045906653
ABSTRACT:
A CMOS EPROM or the like is made wherein the basic memory device or EPROM device is an N-channel IGFET (insulated gate field effect transistor) having a control gate self-aligned with an underlying floating gate. The sources and drains of the EPROM devices as well as the sources and drains of peripheral N-channel transistors, are made by implanting with arsenic and with phosphorous. When heated, the faster diffusing phosphorous outruns, and extends from the bulk of, the arsenic so that these sources and drains extend slightly under the adjacent gate. This extension of the drain in the memory device enables a faster programming capability. A similar but oppositely directed lateral extension of all these sources and drains reduces the leakage to the substrate and reduces the chances of shorts to the substrate due to slightly misaligned metal to source and drain contacts.
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S. Fukunaga et al., FA-CMOS Process for Low Power PROM with Low Avalanche Injection Voltage, International Electron Devices Meeting (IEEE Conference), 1977.
Halfacre Mark A.
Huie Wing K.
Owens Alexander H.
Pan David S.
Roy Upendra
Solid State Scientific Inc.
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