Fishing – trapping – and vermin destroying
Patent
1992-04-20
1993-10-05
Fourson, George
Fishing, trapping, and vermin destroying
437 90, 437164, 148DIG20, H01C 2176
Patent
active
052504611
ABSTRACT:
A method for dielectrically isolating a semiconductor integrated circuit is provided. Each integrated circuit is substantially surrounded by silicon oxide sidewalls which have been appropriately doped to be of an opposite conductivity type as the surrounding substrate. The doped silicon oxide sidewalls are formed prior to the growth of epitaxial silicon within the sidewalls. Upon deposition of the epitaxial silicon the dopant within the oxide sidewalls diffuses into the adjacent epitaxial silicon, thereby resulting in a heavily doped, low resistivity region of epitaxial silicon adjacent to and along the entire length of the oxide sidewall. This heavily doped region results in the substantial elimination of charge-depleting parasitic currents along the sidewalls during use of the integrated circuit. In addition, the heavily doped, low resistivity epitaxial region provides an electrically conductive contact to a buried layer within an integrated circuit having such a buried layer. Extremely thin and long, contacts can be made to the buried layer using this method, without the traditional need for long diffusion times which result in excessively wide diffusion zones.
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Delco Electronics Corporation
Fourson George
Wallace Robert J.
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