Method for dicing wafer stacks to provide access to interior...

Details Method for dicing wafer stacks to provide access to interior... Method for dicing wafer stacks to provide access to interior...

2005-10-18

2005-10-18

Fourson, George (Department: 2823)

Semiconductor device manufacturing: process

Bonding of plural semiconductor substrates

Having enclosed cavity

C438S113000, C438S458000, C438S460000

Reexamination Certificate

active

06955976

ABSTRACT:
Methods for dicing wafer stacks are provided. Preferably, the method includes the steps of: (1) providing a wafer stack having a first wafer and a second wafer; (2) exposing a portion of the first wafer by removing a portion of the second wafer; and (3) dicing the exposed portion of the first wafer such that a first die assembly is at least partially separated from the wafer stack. Wafer stacks and die assemblies also are provided.

REFERENCES:
patent: 6436793 (2002-08-01), Kneezel et al.
patent: 6555901 (2003-04-01), Yoshihara et al.

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