Method for dicing and singulating substrates

Semiconductor device manufacturing: process – Semiconductor substrate dicing

Reexamination Certificate

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C438S465000

Reexamination Certificate

active

10974247

ABSTRACT:
The present invention provides, in one embodiment, a semiconductor wafer (100) dicing process. The dicing process comprises removing circuit features (120) from a street (115) located between dies (105) on a semiconductor substrate (102) using a first blade (135), such that the semiconductor substrate is exposed, and cutting through the exposed semiconductor substrate using a second blade (190). The first blade has a surface (140) coated with an abrasive material (145) comprising grit particles (150), having a median diameter (155) of at least about 25 microns. The grit particles are adhered to the first blade with a bonding agent (160) having a hardness of about 80 or less (Rockwell B Hardness scale). The grit particles have a concentration in the bonding agent ranging from about 25 to about 50 vol %. Another embodiment of the invention is a method of manufacturing a semiconductor device (200).

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patent: 5997597 (1999-12-01), Hagan
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patent: 2002/0157657 (2002-10-01), Toledano
patent: 2001-217211 (2001-08-01), None
patent: 2005-243947 (2005-09-01), None
Nova “A Hub Blade Solution for Dicing Low-K Type Wafers”; Kulicke & Soffa 2003.
Hanxie Zhoa, et al.; “Process Challenges in Low-K Wafer Dicing”; SEMI Technical Symposium “STS:IEMT Poster Session”; Jul. 16, 2003, 5 Pages.

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