Method for determining capacitance values for quieting noisy...

Data processing: measuring – calibrating – or testing – Measurement system in a specific environment – Electrical signal parameter measurement system

Reexamination Certificate

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Details

C702S057000, C702S064000, C702S077000, C702S183000

Reexamination Certificate

active

06397158

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to electronic systems utilizing noisy conductors for delivering power to components mounted on a printed circuit board. More particularly, the present invention relates to a method for determining the value of a capacitance required in order to ensure that a voltage provided to an integrated circuit is within desired tolerances.
2. The Background Art
Modern printed circuit boards have components mounted thereon which require an active power source. The active power source is typically external to the printed circuit board, and supplies power through a connector mounted thereon. Conductive traces which are coupled through the connector to the power source allow the power to be delivered to the proper locations.
Some conductive traces, in addition to performing the intended function of delivering power to various components, unintentionally act as antennas which inductively and capacitively couple signals from other traces. This unintentional coupling of signals is typically undesireable, and in the case of power conductors, results in the fluctuation of power at different frequencies for a given component.
In order to ensure that the supplied power is within desired tolerances, capacitors of various values are placed in the conductive paths between the power supply and the components to which the power is applied, in order to reduce the amplitudes of undesired signals.
FIG. 1
is a block diagram showing a typical placement of capacitors on a printed circuit board.
Referring to
FIG. 1
, system
10
includes printed circuit board
12
, and power source
14
. Printed circuit board
12
includes active components
16
,
18
,
20
,
22
,
24
, and
26
, all of which require a power source. Power source
14
supplys power to the listed components through connector
28
, along conductive paths
32
,
34
,
36
,
38
, and
40
.
In order to ensure that power signals on each of conductive paths
32
,
34
,
36
,
38
, and
40
are within design specifications for each frequency band, capacitors
42
,
44
,
46
,
48
, and
50
are provided. These capacitors have capacitance values which are specifically chosen so that signals which may be unintentionally been coupled to conductive paths
32
,
34
,
36
,
38
, and
40
are reduced in amplitude so that the resulting power is within tolerance at a component.
Although only one capacitor is depicted for each conductive path shown in
FIG. 1
, those of ordinary skill in the art will readily recognize that it is more likely that several capacitors would be present, thus reducing the signal amplitudes associated with more than one frequency band.
Although the prior art method of installing capacitors of various values works for the intended purpose of reducing signal amplitudes in various frequency bands, it is very cumbersome. There is no systematic method used in the prior art to determine the proper values of capacitance which would diminish the amplitude of the undesired signals.
It is therefore desirable to provide a method for determining the proper capacitance values to use in various locations on a printed circuit board, so that the resulting signal amplitudes are within desired tolerances.
SUMMARY OF THE INVENTION
A method for determining the value of at least one capacitance required to be placed in a conductive path on a printed circuit board is disclosed. The method includes preparing a desired signal spectrum for the conductive path, preparing an actual signal spectrum for the conductive path, and then comparing the actual signal spectrum against the desired signal spectrum to determine where any out of tolerance conditions exist. If the actual signal spectrum is in amplitude versus time form, the method further includes performing, for each time having a voltage which is higher than the maximum voltage allowed on the conductive path, a fourier transform on the amplitude versus time data. Following the optional conversion, the method proceeds with the determination of at least one frequency having an amplitude which significantly contributes to the out of tolerance condition, and computing, for the one or more frequencies contributing to the out of tolerance condition, a value of capacitance which would diminish the amplitude at that frequency to a value which is within tolerance.


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