Method for determining an optimal partitioning of data among...

Data processing: software development – installation – and managem – Software program development tool – Translation of code

Reexamination Certificate

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Details

C717S150000, C711S173000, C712S241000, C716S030000

Reexamination Certificate

active

06757892

ABSTRACT:

This invention relates to the field of computer compilers. More specifically, this invention relates to a method and system for determining an optimal allocation of variables between several memories within a target processing system.
BACKGROUND OF THE INVENTION
A compiler is a program that translates programs written in a source language to those written in a target language. The source language is typically a high level language such as Fortran or “C.” The target language is typically assembly code or machine language, but may be a higher level language as well. A compiler usually performs various optimizations to improve the performance of the target program for a given machine. An optimization is any transformation of the program with the aim of improving the performance of the target program.
A “hybrid architecture” processor combines a conventional von Neumann Fixed Instruction Processor (FIP) with the programmable logic on an Adaptive Logic Processor (ALP) to form a single processing unit. Source code compiled to target a hybrid processor should provide a combination of conventional instruction set software for use in the FIP portion of the hybrid processor and a hardware description for use in the ALP portion of the hybrid processor.
Typically, programmers specify the locations of variables declared in the source code using pragma statements inserted within the source code. In this manner, the programmer defines the type and/or location of memory used to support a particular variable. Within the context of a small memory map having few memory variations, such explicit location of variable storage is adequate. However, within the context of a hybrid processing environment, such explicit location of variable storage becomes more difficult.
Therefore, it is seen to be desirable to provide a method and system for optimizing variable location within disparate storage elements of a hybrid processor. It is also seen to be desirable to optimize the location of such variables in a cooperative manner with a compiler program including other types of optimization, such as pipeline scheduling optimizations, and the like.
SUMMARY OF THE INVENTION
The invention comprises method and system for optimizing variable locations within disparate storage elements in a target processing environment according to a least cost analysis based upon the number of times a variable is accessed by one or more program loops forming a program. Specifically, the invention operates to minimize the execution cost of a compiled program by allocating variables associated with the compiled program to a plurality of memories within a target system according to the number of times the variables are utilized by the various program loops forming the program.
The memory partitioning determination method determines an allocation of specified variables among several memories that optimizes execution time of loops for which execution time is a function of the maximum number of accesses to any one memory.


REFERENCES:
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patent: 6219833 (2001-04-01), Solomon et al.
Jeffrey M. Arnold, An Architecture Simulator for National Semiconductor's Adaptive Processing Architecture (NAPA), 15-17 Ap 1998.

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